Navigation
Supported Platforms
Related Documentation
- ACX Series
- External Clock Synchronization Overview for ACX Series Routers
- Configuring External Clock Synchronization for ACX Series Routers
- ACX, MX, PTX Series
- Synchronous Ethernet Overview
- ACX, M, PTX, T Series
- show chassis synchronization
bits
Syntax
bits {
priority number;
quality-level (prc | prs |sec | smc | ssu-a | ssu-b | st2 | st3 | st3e | st4 | stu | tnc);
request request (force-switch | lockout);
}
Hierarchy Level
[edit chassis synchronization source]
Release Information
Statement introduced in Junos OS Release 12.2 for ACX Series Routers.
Description
Configure the external BITS device connected to the router’s T1 or E1 building-integrated timing supply (BITS) interface, which upon configuration becomes a candidate for selection as the clock source by the clock source selection algorithm.
![]() | Note: The bits option is not supported on the ACX1000 router. |
Options
The remaining statements are explained separately. See CLI Explorer.
Required Privilege Level
interface—To view this statement in the configuration.
interface-control—To add this statement to the configuration.
Related Documentation
- ACX Series
- External Clock Synchronization Overview for ACX Series Routers
- Configuring External Clock Synchronization for ACX Series Routers
- ACX, MX, PTX Series
- Synchronous Ethernet Overview
- ACX, M, PTX, T Series
- show chassis synchronization
Modified: 2017-09-13
Supported Platforms
Related Documentation
- ACX Series
- External Clock Synchronization Overview for ACX Series Routers
- Configuring External Clock Synchronization for ACX Series Routers
- ACX, MX, PTX Series
- Synchronous Ethernet Overview
- ACX, M, PTX, T Series
- show chassis synchronization