Help us improve your experience.

Let us know what you think.

Do you have time for a two-minute survey?

Navigation

COS Feature Differences Between PTX Series Packet Transport Switches and T Series Matrix Routers

This topic provides a list of Class of Service features available on PTX Packet Transport Switches and compares them with Class of Service features on T Series routers.

Classifiers

  • T Series routers support VRF table labels for Layer 3 VPNs. On PTX Series Packet Transport Switches, this feature is not supported.
  • On T Series routers, IEEE 802.1 classifiers cannot co-exist with Layer 3 classifiers. On PTX Series Packet Transport Switches, these classifiers can co-exist.
  • On T Series routers, IEEE classifiers are supported by using intelligent PICs. These PICs have the flexibility of classifying traffic based on inner or outer VLAN tags. On PTX Series Packet Transport Switches, IEEE classification is always based on outer VLAN tags.

Rewrite

  • PTX Series Packet Transport Switches do not support rewrite of both exp and inet-precedence fields using:
    • exp protocol mpls-any
    • exp protocol mpls-inet-both
    • exp protocol mpls-inet-both-non-vpn
  • PTX Series Packet Transport Switches support rewrite of both dscp and dscp-ipv6 . On T Series routers, the dscp and dscp-ipv6 rewrite feature is not supported.
  • PTX Series Packet Transport Switches also support layer 2 rewrite of 802.1p and 802.1ad, to either the outer vlan tag, or both outer and inner vlan tags.

Forwarding Class

  • On T Series routers, you can override the default fabric priority queuing of egress traffic by including the priority statement at the following hierarchy level: .
    [class-of-service forwarding-classes queue queue-number class-name] priority (high |low);

    On the PTX Series Packet Transport Switch, fabric priority queuing is not supported; therefore, the priority statement for forwarding-classes is not supported.

Tri-color Marking

  • On T Series routers, the copy-plp-all statement needs to be configured to support tricolor marking. On the PTX Series Packet Transport Switches, tricolor marking is enabled by default.

Schedulers

  • T Series routers, which use egress queuing architecture, support chassis and fabric schedulers. Alternatively, PTX Series Packet Transport Switches support a Virtual Output Queuing (VOQ) architecture that does not require fabric schedulers. With the VOQ architecture, packets are queued and dropped in the ingress during congestion.
  • On T Series routers, high priority queues have precedence to acquire excess bandwidth and may consume all excess bandwidth. On PTX Series Packet Transport Switches, excess bandwidth is shared based on the ratio of configured transfer rate. Therefore, all priority queues get a share of excess bandwidth.
  • On T Series routers, strict-high priority queues and high priority queues are assigned the same hardware priority. On PTX Series Packet Transport Switches, strict-high priority queues and high priority queues are assigned different hardware priorities.
  • On T Series routers, if a strict-high priority queue is oversubscribed, it can block all other queues except high priority queues. On PTX Series Packet Transport Switches, if a strict-high priority queue is oversubscribed, it can block all other queues including high priority queues.
  • To restrict the bandwidth of strict-high priority queues, the transmit-rate rate-limit configuration statement has been implemented for PTX Series Packet Transport Switches.
  • On both T Series routers and PTX Series Packet Transport Switches, if a strict-high priority queue is oversubscribed and results in oversubscription of the guaranteed bandwidth, the distribution of bandwidth that is not taken up by strict-high priority queues is undetermined. T Series routers and PTX Series Packet Transport Switches differently when distributing this unused bandwidth.

Buffer Size and Latency

  • On T Series routers, memory allocation dynamic (MAD) is enabled by default and can be disabled. On PTX Series Packet Transport Switches, MAD cannot be disabled.
  • On T Series routers, the maximum delay bandwidth buffering configured per queue is 50 MS. On the PTX, the maximum delay bandwidth buffering configured per queue is 100 MS.
  • On T Series routers, the maximum latency associated with a packet is fairly consistent and independent of the number of sources sending the traffic to an interface. On the PTX Series Packet Transport Switch, over-provisioning is possible. When traffic is sent from multiple Packet Forwarding Engines, the latency is about 10%-15% higher than when traffic is sent from one Packet Forwarding Engine.
  • On T Series routers, a high priority queue has lower latency than a low priority queue with the same configured transfer rate and same offered load. On PTX Series Packet Transport Switches, there is no latency difference.

Drop Profile

  • The Queuing and Memory Interfaces ASIC does not support drop-profile assignments for a queue based on the protocol. As a consequence, the protocol option for the drop-profile-map configuration statement is treated as protocol any.

Interface Queue Statistics (show interfaces queue output)

  • On T Series routers, transmitted byte counters are computed using Layer 3 packet length. On PTX Series Packet Transport Switches, transmitted byte counters are computed using Layer 2 packet length (excluding CRC).
  • On the PTX Series Packet Transport Switches, tail-dropped counters are always zero. All the packet drops will be shown as random early detection (RED-dropped) in the output for the show interfaces queue CLI command.
  • On T Series routers, the Tail-dropped counters and the RED-dropped counters are displayed separately in the output.

Published: 2013-10-15