Navigation
Related Documentation
- M, MX, T Series
- Stacking and Rewriting Gigabit Ethernet VLAN Tags
- MX, T Series
- input-vlan-map (Aggregated Ethernet)
output-vlan-map (Aggregated Ethernet)
Syntax
Hierarchy Level
Release Information
Statement introduced in Junos OS Release 8.2.
Description
For aggregated Ethernet interfaces using Gigabit Ethernet IQ, 10-Gigabit Ethernet IQ2 and IQ2-E interfaces, and 100-Gigabit Ethernet Type 5 PIC with CFP only, define the rewrite profile to be applied to outgoing frames on this logical interface.
The statements are explained separately.
Required Privilege Level
interface—To view this statement in the configuration.
interface-control—To add this statement to the configuration.
Related Documentation
- M, MX, T Series
- Stacking and Rewriting Gigabit Ethernet VLAN Tags
- MX, T Series
- input-vlan-map (Aggregated Ethernet)
Published: 2013-08-01
Related Documentation
- M, MX, T Series
- Stacking and Rewriting Gigabit Ethernet VLAN Tags
- MX, T Series
- input-vlan-map (Aggregated Ethernet)