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Configuring Line Card Interoperability

Interoperability of Type 3 FPCs and Type 4 FPCs with Type 5 FPCs

Support for interoperability of Type 3 FPCs, Type 4 FPCs, and T640-FPC4-1P-ES with Type 5 FPCs is now possible with fabric notification translation. This feature is supported on T4000 routers.

Basic packet forwarding, IPv4, IPv6, MPLS, and multicast (dataplane) are currently supported through this feature.

Configuring 100-Gigabit Ethernet MICs to Interoperate with Type 4 100-Gigabit Ethernet PICs (PD-1CE-CFP-FPC4) Using SA Multicast Mode

To configure a 100-Gigabit Ethernet MIC (MIC3-3D-1X100GE-CFP) to interoperate with Juniper Networks Type 4 100-Gigabit Ethernet PICs (model number PD-1CE-CFP-FPC4), you can use the forwarding-mode statement with the sa-multicast option at the [edit chassis fpc slot pic slot] hierarchy level.

SA multicast mode uses the multicast bit in the source MAC address for packet steering. By default, the SA multicast bit is set to 0 for all packets sent by the 100-Gigabit Ethernet MIC. The egress packet flow is the traffic flowing from the 100-Gigabit Ethernet MIC to the 100-Gigabit Ethernet PIC. Since no VLAN tags are available, the SA multicast bit is sent on the outgoing packets. At the other end, the 100-Gigabit Ethernet PIC looks at the bit and forwards the packets to either Packet Forwarding Engine 0 or 1. The ingress packet flow is the traffic flowing from a 100-Gigabit Ethernet PIC to a 100-Gigabit Ethernet MIC. When the 100-Gigabit Ethernet PIC is sending out a packet, the multicast bit is set based on the Packet Forwarding Engine packet received. The multicast bit is then transmitted and the MPC3E sees the multicast bit on ingress.

Note:

The SA multicast bit is ignored by MPC3E while learning the source MAC addresses.

Configuring 100-Gigabit Ethernet MICs

The interoperability mode between the 100-Gigabit Ethernet MIC and the 100-Gigabit Ethernet PIC is configured on a PIC basis. The MPC3E has two MIC slots. A 100-Gigabit Ethernet MIC installed in slot 0 corresponds to pic 0, and the MIC installed in slot 1 corresponds to pic 2.

Note:

The configuration is valid only on PIC 0 and PIC 2.

To configure SA multicast mode on a Juniper Networks 100-Gigabit Ethernet MIC in MPC 0, PIC 0 for interconnection with another Juniper Networks 100-Gigabit Ethernet PIC, use the set chassis fpc slot pic slot forwarding-mode sa-multicast command, as follows:

You can use the show forwarding-mode command to view the resulting configuration, as follows:

Configuring 100-Gigabit Ethernet PIC (PD-1CE-CFP-FPC4)

The default packet steering mode for the 100-Gigabit Ethernet PIC (PD-1CE-CFP-FPC4)is SA multicast bit mode. There is no SA multicast configuration required on the 100-Gigabit Ethernet PIC to enable this mode.

Note:

SA multicast mode can be configured, but it is not necessary.

The 100-Gigabit Ethernet PIC uses a Type 4 FPC and two 50 Gpbs Packet Forwarding Engines to achieve 100 Gbps throughput. The 50 Gpbs physical interfaces are created when the 100-Gigabit Ethernet PIC is installed. The two physical interfaces are visible and configuration is allowed on both physical interfaces. The physical interfaces on the 100-Gigabit Ethernet PIC should be configured in static LAG mode without enabling Link Aggregation Control Protocol (LACP). This ensures that a single 100-Gigabit aggregated interface is visible on the link connecting to the 100-Gigabit Ethernet MIC instead of two independent 50 Gpbs interfaces.

When the PIC is in aggregated Ethernet mode, the two physical interfaces on the same PIC are aggregated into one AE physical interface. When the PIC is configured with two physical interfaces, it creates the physical interfaces et-fpc/pic/0:0 and et-fpc/pic/0:1 where fpc is the FPC slot number and pic is the PIC slot number. The example shows how to configure two physical interfaces for PIC 0 in FPC 5:

Interoperability Between MPC4E (MPC4E-3D-2CGE-8XGE) and 100-Gigabit Ethernet PICs on Type 4 FPC

You can enable interoperability between the MPC4E (MPC4E-3D-2CGE-8XGE) and the 100-Gigabit Ethernet PIC (PD-1CE-CFP-FPC4) by:

  • Enabling source address (SA) multicast bit steering mode on the MPC4E.

  • Configuring the two 50-Gigabit Ethernet physical interfaces on the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 as one aggregated Ethernet physical interface.

SA multicast mode uses the multicast bit in the source MAC address for packet steering. By default, the SA multicast bit is set to 0 for all packets sent by the MPC4E. The egress packet flow is the traffic flowing from the MPC4E to the 100-Gigabit Ethernet PIC. Because no VLAN tags are available, the SA multicast bit is sent on the outgoing packets. At the other end, the 100-Gigabit Ethernet PIC checks the multicast bit and forwards the packets to either Packet Forwarding Engine 0 or Packet Forwarding Engine 1. The ingress packet flow is the traffic flowing from the 100-Gigabit Ethernet PIC to the MPC4E. When the 100-Gigabit Ethernet PIC sends out a packet, the multicast bit is set based on the packet received from the Packet Forwarding Engine. The multicast bit is then transmitted and the MPC4E checks the multicast bit on ingress.

The 100-Gigabit Ethernet PIC uses a Type 4 FPC and two 50-Gbps Packet Forwarding Engines to achieve a throughput of 100 Gbps. The 50-Gbps physical interfaces are created when the 100-Gigabit Ethernet PIC is plugged in. The two physical interfaces are visible and configuration is allowed on both physical interfaces. The physical interfaces on the 100-Gigabit Ethernet PIC must be configured in static LAG mode without enabling Link Aggregation Control Protocol (LACP). This ensures that a single 100-Gigabit Ethernet aggregated interface is visible on the link connecting to the MPC4E instead of two independent 50-Gbps interfaces.

Configuring MPC4E (MPC4E-3D-2CGE-8XGE) to Interoperate with 100-Gigabit Ethernet PICs on Type 4 FPC Using SA Multicast Mode

You can enable interoperability between the MPC4E and the 100-Gigabit Ethernet PIC by performing the following tasks:

Configuring SA Multicast Bit Steering Mode on MPC4E

The interoperability mode between the MPC4E and the 100-Gigabit Ethernet PIC is configured on a PIC basis. MPC4E-3D-2CGE-8XGE is a fixed-configuration MPC and does not contain separate slots for Modular Interfaces Cards (MICs). MPC4E contains two Packet Forwarding Engines—PFE 0 hosts PIC 0 and PIC 1 and PFE 1 hosts PIC 2 and PIC 3.

Note:

This configuration is valid only on PIC 1 and PIC 3.

To configure SA multicast mode on PIC 1 of an MX480 router with MPC4E for interconnection with the 100-Gigabit Ethernet PIC:

  1. To specify the forwarding mode as sa-multicast, include the forwarding-mode statement at the [edit chassis fpc slot pic slot] hierarchy level.
  2. To verify that the forwarding mode is set to sa-multicast, issue the following command:

Configuring Two 50-Gigabit Ethernet Physical Interfaces on the Ethernet PIC as One Aggregated Ethernet Interface

When the PIC is in aggregated Ethernet mode, the two physical interfaces on the same PIC are aggregated into one aggregated Ethernet physical interface. When the PIC is configured with two physical interfaces, it creates the physical interfaces et-x/y/0:0 and et-x/y/0:,1 where x is the FPC slot number and y is the PIC slot number.

The default packet steering mode for the 100-Gigabit Ethernet PIC is SA multicast bit mode. No SA multicast configuration is required on the 100-Gigabit Ethernet PIC to enable this mode.

Note:

SA multicast mode can be configured, but it is not necessary.

  1. To specify the number of aggregated Ethernet interfaces to be created:
  2. To specify the members to be included within the aggregated Ethernet bundle:
  3. Verify the configuration at the interface.

Interoperability Between MPC7E-MRATE and 100-Gigabit Ethernet PICs on Type 4 FPC

You can enable interoperability between the MPC7E (MPC7E-MRATE) and the 100-Gigabit Ethernet PIC (PD-1CE-CFP-FPC4) by:

  • Enabling source address (SA) multicast bit steering mode on the MPC7E

  • Configuring the two 50-Gigabit Ethernet physical interfaces on the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 as one aggregated Ethernet physical interface.

SA multicast mode uses the multicast bit in the source MAC address for packet steering. By default, the SA multicast bit is set to 0 for all packets sent by the MPC7E. The egress packet flow is the traffic flowing from the MPC to the 100-Gigabit Ethernet interface. Because no VLAN tags are available, the SA multicast bit is sent on the outgoing packets. At the other end, the 100-Gigabit Ethernet interface checks the multicast bit and forwards the packets to either Packet Forwarding Engine 0 or Packet Forwarding Engine 1. The ingress packet flow is the traffic flowing from the 100-Gigabit Ethernet interface to the MPC7E. When the 100-Gigabit Ethernet interface sends out a packet, the multicast bit is set based on the packet received from the Packet Forwarding Engine. The multicast bit is then transmitted and the MPC7E checks the multicast bit on ingress.

The 100-Gigabit Ethernet PIC uses a Type 4 FPC and two 50-Gbps Packet Forwarding Engines to achieve a throughput of 100 Gbps. The 50-Gbps physical interfaces are created when the 100-Gigabit Ethernet PIC is plugged in. The two physical interfaces are visible and configuration is allowed on both physical interfaces. The physical interfaces on the 100-Gigabit Ethernet PIC must be configured in static LAG mode without enabling Link Aggregation Control Protocol (LACP). This ensures that a single 100-Gigabit Ethernet aggregated interface is visible on the link connecting to the MPC7E instead of two independent 50-Gbps interfaces.

Configuring MPC7E-MRATE to Interoperate with 100-Gigabit Ethernet PICs on Type 4 FPC Using SA Multicast Mode

You can enable interoperability between the MPC7E (MPC7E-MRATE) and the 100-Gigabit Ethernet PIC by performing the following tasks:

Configuring SA Multicast Bit Steering Mode on MPC7E

The interoperability mode between the MPC7E (MPC7E-MRATE) and the 100-Gigabit Ethernet PIC is configured on a PIC basis. MPC7E is a fixed-configuration MPC and does not contain separate slots for Modular Interfaces Cards (MICs). MPC7E contains two Packet Forwarding Engines—PFE 0 hosts PIC 0 and PFE 1 hosts PIC 1 .

To configure SA multicast mode on FPC13,PIC 1 of MPC7E-MRATE for interconnection with the 100-Gigabit Ethernet PIC:

  1. To specify the forwarding mode as sa-multicast, include the forwarding-mode statement at the [edit chassis fpc slot pic slot] hierarchy level.
  2. To verify that the forwarding mode is set to sa-multicast, issue the following command:

Configuring Two 50-Gigabit Ethernet Physical Interfaces on the Ethernet PIC as One Aggregated Ethernet Interface

When the PIC is in aggregated Ethernet mode, the two physical interfaces on the same PIC are aggregated into one aggregated Ethernet physical interface. When the PIC is configured with two physical interfaces, it creates the physical interfaces et-x/y/0:0 and et-x/y/0:,1 where x is the FPC slot number and y is the PIC slot number.

The default packet steering mode for the 100-Gigabit Ethernet PIC is SA multicast bit mode. No SA multicast configuration is required on the 100-Gigabit Ethernet PIC to enable this mode.

Note:

SA multicast mode can be configured, but it is not necessary.

  1. To specify the number of aggregated Ethernet interfaces to be created:
  2. To specify the members to be included within the aggregated Ethernet bundle:
  3. Verify the configuration at the interface.

Interoperability Between MPC8E (MX2K-MPC8E) and 100-Gigabit Ethernet PICs on Type 4 FPC

You can enable interoperability between the MPC8E (MX2K-MPC8E) and the 100-Gigabit Ethernet PIC (PD-1CE-CFP-FPC4) by:

  • Enabling source address (SA) multicast bit steering mode on the MPC8E.

  • Configuring the two 50-Gigabit Ethernet physical interfaces on the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 as one aggregated Ethernet physical interface.

SA multicast mode uses the multicast bit in the source MAC address for packet steering. By default, the SA multicast bit is set to 0 for all packets sent by the MPC8E. The egress packet flow is the traffic flowing from the MPC to the 100-Gigabit Ethernet Interface. Because no VLAN tags are available, the SA multicast bit is sent on the outgoing packets. At the other end, the 100-Gigabit Ethernet Interface checks the multicast bit and forwards the packets to either Packet Forwarding Engine 0 or Packet Forwarding Engine 1. The ingress packet flow is the traffic flowing from the 100-Gigabit Ethernet Interface to the MPC8E. When the 100-Gigabit Ethernet Interface sends out a packet, the multicast bit is set based on the packet received from the Packet Forwarding Engine. The multicast bit is then transmitted and the MPC8E checks the multicast bit on ingress.

The 100-Gigabit Ethernet PIC uses a Type 4 FPC and two 50-Gbps Packet Forwarding Engines to achieve a throughput of 100 Gbps. The 50-Gbps physical interfaces are created when the 100-Gigabit Ethernet PIC is plugged in. The two physical interfaces are visible and configuration is allowed on both physical interfaces. The physical interfaces on the 100-Gigabit Ethernet PIC must be configured in static LAG mode without enabling Link Aggregation Control Protocol (LACP). This ensures that a single 100-Gigabit Ethernet aggregated interface is visible on the link connecting to the MPC8E instead of two independent 50-Gbps interfaces.

Configuring MPC8E to Interoperate with 100-Gigabit Ethernet PICs on Type 4 FPC Using SA Multicast Mode

You can enable interoperability between the MPC8E (MX2K-MPC8E) and the 100-Gigabit Ethernet PIC by performing the following tasks:

Configuring SA Multicast Bit Steering Mode on MPC8E

The interoperability mode between the MPC8E and the 100-Gigabit Ethernet PIC is configured on a PIC basis. MPC8E (MX2K-MPC8E) is a modular MPC that contains two slots for Modular Interfaces Cards (MICs). MPC8E contains four Packet Forwarding Engines—PIC 0 hosts PFE 0 and PFE 1. PIC 1hosts PFE 2 and PFE 3.

To configure SA multicast mode on FPC 7,PIC 1 of MPC8E for interconnection with the 100-Gigabit Ethernet PIC:

  1. To specify the forwarding mode as sa-multicast, include the forwarding-mode statement at the [edit chassis fpc slot pic slot] hierarchy level.
  2. To verify that the forwarding mode is set to sa-multicast, issue the following command:

Configuring Two 50-Gigabit Ethernet Physical Interfaces on the Ethernet PIC as One Aggregated Ethernet Interface

When the PIC is in aggregated Ethernet mode, the two physical interfaces on the same PIC are aggregated into one aggregated Ethernet physical interface. When the PIC is configured with two physical interfaces, it creates the physical interfaces et-x/y/0:0 and et-x/y/0:,1 where x is the FPC slot number and y is the PIC slot number.

The default packet steering mode for the 100-Gigabit Ethernet PIC is SA multicast bit mode. No SA multicast configuration is required on the 100-Gigabit Ethernet PIC to enable this mode.

Note:

SA multicast mode can be configured, but it is not necessary.

  1. To specify the number of aggregated Ethernet interfaces to be created:
  2. To specify the members to be included within the aggregated Ethernet bundle:
  3. Verify the configuration at the interface.

Interoperability Between MPC9E (MX2K-MPC9E) and 100-Gigabit Ethernet PICs on Type 4 FPC

You can enable interoperability between the MPC9E (MX2K-MPC9E) and the 100-Gigabit Ethernet PIC (PD-1CE-CFP-FPC4) by:

  • Enabling source address (SA) multicast bit steering mode on the MPC9E.

  • Configuring the two 50-Gigabit Ethernet physical interfaces on the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 as one aggregated Ethernet physical interface.

SA multicast mode uses the multicast bit in the source MAC address for packet steering. By default, the SA multicast bit is set to 0 for all packets sent by the MPC9E. The egress packet flow is the traffic flowing from the MPC9E to the 100-Gigabit Ethernet Interface. Because no VLAN tags are available, the SA multicast bit is sent on the outgoing packets. At the other end, the 100-Gigabit Ethernet Interface checks the multicast bit and forwards the packets to either Packet Forwarding Engine 0 or Packet Forwarding Engine 1. The ingress packet flow is the traffic flowing from the 100-Gigabit Ethernet Interface to the MPC9E. When the 100-Gigabit Ethernet interface sends out a packet, the multicast bit is set based on the packet received from the Packet Forwarding Engine. The multicast bit is then transmitted and the MPC9E checks the multicast bit on ingress.

The 100-Gigabit Ethernet PIC uses a Type 4 FPC and two 50-Gbps Packet Forwarding Engines to achieve a throughput of 100 Gbps. The 50-Gbps physical interfaces are created when the 100-Gigabit Ethernet PIC is plugged in. The two physical interfaces are visible and configuration is allowed on both physical interfaces. The physical interfaces on the 100-Gigabit Ethernet PIC must be configured in static LAG mode without enabling Link Aggregation Control Protocol (LACP). This ensures that a single 100-Gigabit Ethernet aggregated interface is visible on the link connecting to the MPC9E instead of two independent 50-Gbps interfaces.

Configuring MPC9E to Interoperate with 100-Gigabit Ethernet PICs on Type 4 FPC Using SA Multicast Mode

You can enable interoperability between the MPC9E (MX2K-MPC9E) and the 100-Gigabit Ethernet PIC by performing the following tasks:

Configuring SA Multicast Bit Steering Mode on MPC9E

The interoperability mode between the MPC9E and the 100-Gigabit Ethernet PIC is configured on a PIC basis. MPC9E (MX2K-MPC9E) is a modular MPC that contains two slots for Modular Interfaces Cards (MICs). MPC9E contains four Packet Forwarding Engines—PIC 0 hosts PFE 0 and PFE 1. PIC 1 hosts PFE 2 and PFE 3.

To configure SA multicast mode on FPC 19, PIC 1 of MPC9E for interconnection with the 100-Gigabit Ethernet PIC:

  1. To specify the forwarding mode as sa-multicast, include the forwarding-mode statement at the [edit chassis fpc slot pic slot] hierarchy level.
  2. To verify that the forwarding mode is set to sa-multicast, issue the following command:

Configuring Two 50-Gigabit Ethernet Physical Interfaces on the Ethernet PIC as One Aggregated Ethernet Interface

When the PIC is in aggregated Ethernet mode, the two physical interfaces on the same PIC are aggregated into one aggregated Ethernet physical interface. When the PIC is configured with two physical interfaces, it creates the physical interfaces et-x/y/0:0 and et-x/y/0:,1 where x is the FPC slot number and y is the PIC slot number.

The default packet steering mode for the 100-Gigabit Ethernet PIC is SA multicast bit mode. No SA multicast configuration is required on the 100-Gigabit Ethernet PIC to enable this mode.

Note:

SA multicast mode can be configured, but it is not necessary.

  1. To specify the number of aggregated Ethernet interfaces to be created:
  2. To specify the members to be included within the aggregated Ethernet bundle:
  3. Verify the configuration at the interface.

Related Documentation