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Understanding Clock Synchronization

Starting with Junos OS Release 14.2, MX Series and PTX Series routers support external clock synchronization and automatic clock selection for Synchronous Ethernet, T1 or E1 line timing sources, and external inputs.

Starting with Junos OS Release 17.3, MX 10003 routers support external clock synchronization and automatic clock selection for Synchronous Ethernet, T1 or E1 line timing sources, and external inputs.

Configuring external clock synchronization and automatic clock selection requires making clock selection, quality level, and priority considerations. The clock source selection algorithm is used to pick the two best upstream clock sources from among the various sources on the basis of system configuration and execution criteria such as quality level, priority, and hardware restrictions.

MX5-T, MX10-T, MX40-T, MX80, MX80-T, MX240, MX480, MX960, MX2020, PTX3000, and PTX5000 routers support external clock synchronization using Synchronous Ethernet. Synchronous Ethernet is a physical layer technology that functions regardless of the network load and supports hop-by-hop frequency transfer, where all interfaces on the trail must support Synchronous Ethernet.

The Switch Control Board (SCB) supports distributed clocking mode. Starting from Junos OS Release 12.2, the Enhanced Switch Control Board—SCBE—supports centralized clocking mode and has one external clock interface.

Starting from Junos OS Release 13.3, the Enhanced Switch Control Board—SCBE2—supports centralized clocking mode and has two external clock interfaces external-0/0 and external-1/0. Note that the external-0/0 interface refers to the external interface on the SCB in slot 0 and the external 1/0 interface refers to the external interface on the SCB slot 1.

Note:

On SCBE2, you can configure the external synchronization options only on the external interface on the active SCB. Therefore, if the active SCB is in slot 0, then you can configure the external-0/0 interface only. If the active SCB is in slot 1, then you can configure the external-1/0 interface only.

The PTX Series Packet Transport Routers support an external synchronization interface that can be configured to synchronize the internal Stratum 3 clock on the CCG to an external source, and then synchronize the chassis interface clock to that source.

The following sections explain external clock synchronization and its configuration parameters in detail:

Clock Selection

Configuring external clock synchronization requires making clock selection, quality level, and priority considerations. The clock selection algorithm is used to pick the two best clock sources—primary and secondary—from among the various sources.

The clock selection algorithm is on the basis of the system configuration and execution criteria such as quality level, priority, hardware restrictions, and so on, and is achieved using the following logic and restrictions:

  • The following parameters must be configured irrespective of whether the quality level is enabled or not (You can set the quality level with the set chassis synchronization source interfaces external quality-level quality-level configuration command at the [edit] hierarchy level.):

    • Quality level must be configured for nonexternal clocks.

    • In the case of option-1, the quality level must be configured for the external clocks.

    • In the case of option-2, the default quality level for the external clocks is QL_STU.

    The synchronous Ethernet Equipment Clock (EEC) synchronization networking types option-1 and option-2 map to G.813 option 1 (EEC1) and G.812 type IV clock (EEC1) standards, respectively, and can be configured at the [edit chassis synchronization] hierarchy level.

  • When the quality-mode-enable statement is included at the [edit chassis synchronization] hierarchy level, the received quality level must be equal to or better than the configured quality level for that particular source, otherwise that source is not considered for clock selection. This is so that a downstream client is guaranteed clock quality of a certain level. (Note that the term certain level here denotes the configured quality level.)

  • Starting with Junos OS Release 12.2R1, configuring the quality level for a Synchronous Ethernet interface is optional when the quality-mode-enable and the selection-mode received-quality statements are included at the [edit chassis synchronization] hierarchy level.

    The default quality level value for a Synchronous Ethernet interface is:

    • SEC for the option-1 network type.

    • ST3 for the option-2 network type.

  • Configuring the priority statement is optional. When not specified, the external-a interface has a higher default priority than the external-b interface, and the external-b interface has a higher default priority than Ethernet-based sources such as ge or xe clock sources, which have the lowest default priority.

    Note:

    Configured priority is higher than any default priority.

  • During clock selection:

    • The active source with the highest quality level is selected.

    • The configured (or default) quality level of the selected clock source is used for Ethernet Synchronization Message Channel (ESMC). In order to receive or transmit ESMC messages out of an interface, at least one logical interface must be configured on that interface.

    • Table 1 explains a few scenarios that must be taken into consideration during clock selection:

      Table 1: Clock Selection Scenarios

      If

      Then

      Two or more sources have the same quality level.

      The source with highest priority is selected.

      Two or more sources have the same quality level and priority.

      The current active source, if any, among these sources is selected.

      Two or more sources have the same quality level and priority, and none of these is currently active.

      Any one of these sources is selected.

      Primary clock source is ge|xe-x/y/z, where y is even (0 or 2).

      The secondary clock source cannot be ge|xe-x/y/* or ge|xe-x/y + 1/*.

      For example, if ge-1/2/3 is the primary clock source, then the secondary clock source cannot be ge-1/2/* or ge-1/3/* for an MX80, MX240, MX480, or an MX960 router.

      Primary clock source is ge|xe-x/y/z, where y is odd (1 or 3).

      The secondary clock source cannot be ge|xe-x/y/* or ge|xe-x/y - 1/*.

      For example, if xe-2/3/4 is the primary clock source, then the secondary clock source cannot be xe-2/2/* or xe-2/3/* for an MX80, MX240, MX480, or an MX960 router.

      Primary clock source is ge|xe-x/y/z.

      The secondary clock source cannot be ge|xe-x/y/* in the case of 12-port or 16-port 10-Gigabit Ethernet DPC on an MX Series router.

      For example, if ge-0/1/2 is the primary clock source, then ge-0/1/* cannot be the secondary clock source, but ge-0/0/* can be the secondary clock source.

Starting with Junos OS Release 14.2, note that on PTX Series routers, you can specify the primary and secondary clock sources provided the clock source meets the necessary qualification as set by the clock algorithm. However, in the absence of any user-selected clock source, the clock source with the best quality level is selected by the clock algorithm in the router. Note that the user selection is honored even when better quality level clock sources are available. You can select the clock source with the request chassis synchronization switch clock-source operational mode command. For more information, see request chassis synchronization switch.

Note:

The clock sources used as primary or secondary clock sources cannot originate from the same FPC.

Network Option

The clock type or network option is the synchronous Ethernet Equipment Clock (EEC) synchronization networking type. You can set the network option to one of the following values:

  • option-1—This option maps to G.813 option 1 (EEC1).

  • option-2—This option maps to G.812 type IV clock (EEC1).

Note:

On MX104 routers, to configure the OC-192, OC-3, OC-12, or OC-48 interfaces as clock sources, ensure that the option-2 network option is configured.

Note:

For SCB, this option is configured with the set chassis synchronization network-type (option-1 | option-2) configuration command at the [edit] hierarchy level.

To configure the clock type, execute the set chassis synchronization network-option (option-1 | option-2) configuration command at the [edit] hierarchy level.

Note:

For Junos OS Releases 11.2R4 through 13.3R3 for MX240, MX480, MX960, MX2010, and MX2020 with SCB, SCBE or SCBE2, you must execute some specific commands after you change the network option at the [edit chassis synchronization] hierarchy level. This is because the loop bandwidth does not change automatically when you change the network option. These are the required commands:

Clock Mode

You can set the Synchronous Ethernet clock source to one of the following modes:

  • free-run—In this mode, the free-running local oscillator is used as a clock source.

    Note:

    For MX80 routers, the free-run clock is provided by the local oscillator.

    For MX240, MX480, and MX960 routers with an SCB, the free-run clock is provided by the MPCs.

    For MX240, MX480, and MX960 routers with an SCBE or an SCBE2, the free-run clock is provided by the local oscillator.

  • auto-select—In this mode, the best external clock source is selected.

By default, the auto-select option is selected.

To configure the clock mode, execute the set chassis synchronization clock-mode (free-run | auto-select) configuration command at the [edit] hierarchy level.

Quality Mode

When the quality-mode-enable statement is included at the [edit chassis synchronization] hierarchy level, the system ascertains that the clock selection algorithm uses both quality and priority of the clock sources to select the best clock source for clock synchronization. When the quality-mode-enable statement is not included, only the priority of the clock source is taken into account by the algorithm.

To enable the synchronization quality mode, include the quality-mode-enable statement at the [edit chassis synchronization] hierarchy level.

Note:

The Synchronous Ethernet ESMC quality mode is disabled by default. The Synchronous Ethernet ESMC quality mode is disabled when the quality-mode-enable statement is not included.

Selection Mode

You can specify whether the clock source selection must use the configured or the received ESMC or SSM quality level for a qualifying interface. In both selection modes, the interface qualifies for clock source selection only when the received ESMC or SSM quality level on the interface is equal to or greater than the configured ESMC or SSM quality level for the interface.

The selection modes are:

  • configured-quality—In this mode, the clock source selection algorithm uses the ESMC or SSM quality level configured for a qualifying interface.

  • received-quality—In this mode, the clock source selection algorithm uses the ESMC or SSM quality level received on the qualifying interface.

To configure the clock source algorithm selection mode, execute the set chassis synchronization selection-mode (configured-quality|received-quality) configuration command at the [edit] hierarchy level.

Note:

For the selection-mode statement to take effect, you must include the quality-mode-enable statement at the [edit chassis synchronization] hierarchy level.

Hold Interval

You can set the chassis synchronization wait time after a change in configuration, the clock selection wait time after reboot of the router, and the switchover wait time after a switchover of SCB before selecting the new clock source. The hold interval options are:

  • configuration-change—In this mode, the wait time for clock selection after a change in configuration (clock synchronization configuration) can be set from 15 seconds through 60 seconds.

  • restart—In this mode, the wait time for clock selection after reboot of the router can be set from 60 seconds through 180 seconds.

  • switchover—In this mode, the switchover wait time after clock recovery can be set from 30 seconds through 60 seconds.

To set the hold interval, execute the set chassis synchronization hold-interval (configuration-change | restart | switchover) seconds configuration command at the [edit] hierarchy level.

Note:

The default switchover wait time is 30 seconds and the default restart wait time is 120 seconds.

Switchover Mode

You can set the switchover mode to switch the clock from a lower quality source to higher quality source or to use the current clock source only. You can configure the switchover mode to one of the following:

  • non-revertive—In this mode, the router uses the current clock source as long as it is valid.

  • revertive—In this mode, the router automatically switches from a lower to a higher quality clock source whenever the higher clock source becomes available.

The default mode is revertive mode.

To configure the switching mode, execute the set chassis synchronization switchover-mode (revertive | non-revertive) configuration command at the [edit] hierarchy level.

Clock Source

You can specify the parameters that must be considered by the clock selection algorithm while selecting the best clock source. The parameters include the quality level value, the priority of the clock source, the request criteria, and the wait time to restore the interface signal to up state. You must specify these parameters on the external clock interfaces or other qualifying interfaces—which are connected to valid clock sources—to select the best clock source on the basis of the timing messages that are received on these interfaces.

For an SCBE, you can configure only one external interface and configure multiple Ethernet interfaces as needed.

On SCBE2, you can configure two external interfaces—external-0/0 and external-1/0—and configure multiple Ethernet interfaces as needed.

To configure the clock source, execute the set chassis synchronization source interfaces interface-name configuration command. You can also configure the clock source with the set chassis synchronization source interfaces external at the [edit] hierarchy level, where the external option refers to an external clock interface.

Note:

Incorporate the external option as needed on the basis of the SCB in your MX Series router.

To specify the clock source for an interface, you must set the following options:

  • priority—You can set the user priority for the selected clock source from 1 through 5.

    To set the synchronization source priority for the selected clock source, execute the set chassis synchronization source interfaces interface-name priority number configuration command or the set chassis synchronization source interfaces external priority number configuration command at the [edit] hierarchy level.

  • request—You can set the clock selection request criterion as one of the following:

    • force-switch—With this option, you can force the SCB to switch to a clock source you prefer on a particular interface (that is you can select a clock source on an interface overriding the algorithm), provided the source is enabled and not locked out. Only one configured source can be force-switched.

    • lockout—With this option configured, the clock source is not to be considered by the selection process. Lockout can be configured for any source.

    To configure these options, execute the set chassis synchronization source interfaces interface-name request (force-switch|lockout) configuration command or the set chassis synchronization source interfaces external request (force-switch|lockout) configuration command at the [edit] hierarchy level.

  • wait-to-restore—You can set the wait-to-restore time for each interface. When an interface’s signal transitions out of the signal fail state, it must be fault-free for the wait-to-restore time before it is again considered by the clock selection process. You can configure the interface signal upstate time—wait time before opening the interface to receive ESMC messages—from 0 through 12 minutes. The default time is 5 minutes. When the ESMC clock’s EEC quality level (QL) mode is enabled, it sends a signal failure to the clock selection process during the wait-to-restore time. After the wait-to-restore time ends, a new quality level value is sent to the clock selection process.

    To configure the wait-to-restore time, execute the set chassis synchronization source interfaces interface-name wait-to-restore minutes configuration command or the set chassis synchronization source interfaces external wait-to-restore minutes configuration command at the [edit] hierarchy level.

  • hold-off-time—Starting with Junos OS Release 14.2, you can configure hold-off time for Synchronous Ethernet interfaces and external clock source interfaces to prevent rapid successive switching between signal fail states. If an interface goes down, hold-off time delays short signal failures from being sent to the clock selection process.

    Note:

    During the hold-off time period, if the clock synchronization process restarts, hold-off time is not considered.

    If you configure hold-off time when the ESMC clock’s EEC QL mode is enabled, the configured quality level is used in the clock selection process during the hold-off time period. During the hold-off time period, the external clock source appears in a locked state until the hold-off time period ends. After the hold-off time period ends, a signal failure is sent to the clock selection process.

    You can configure hold-off time for a range of 300 through 1800 milliseconds. The default hold-off time is 1000 milliseconds.

    To configure hold-off time, execute the set chassis synchronization source interfaces interface-name hold-off-time configuration command at the [edit] hierarchy level.

    Note:

    When a link goes down and comes back up within the configured hold-off time in a clocking hybrid mode configuration (the combined operation of Synchronous Ethernet and Precision Time Protocol) that includes the protocols ptp slave convert-clock-class-to-quality-level configuration statement at the [edit] hierarchy level, the phase might not get locked before the timer expires. This might result in a degradation of clock quality level.

  • quality—You can set the ESMC clock’s EEC quality level as prc, prs, sec, smc, ssu-a, ssu-b, st2, st3, st3e, st4, stu, or tnc. Both option I and option II SSM quality levels are supported. Table 2 explains the quality level values.

    Table 2: Quality Levels

    Quality Level

    Description

    prc

    Timing quality of a primary reference clock (option-1 only).

    prs

    Clock traceable to a primary reference source (option-2 only).

    sec

    Timing quality of an SDH equipment clock (option-1 only).

    smc

    Clock traceable to a self-timed SONET clock (option-2 only).

    ssu-a

    Timing quality of a type I or IV client clock (option-1 only).

    ssu-b

    Timing quality of a type VI client clock (option-1 only).

    st2

    Clock traceable to Stratum 2 (option-2 only).

    st3

    Clock traceable to Stratum 3 (option-2 only).

    st3e

    Clock traceable to Stratum 3E (option-2 only).

    st4

    Clock traceable to Stratum 4 free-run (option-2 only).

    stu

    Clock traceable to an unknown quality (option-2 only).

    tnc

    Clock traceable to a transit node clock (option-2 only).

    Note:

    When the quality level is not configured and no ESMC messages are received by the clock source, then the quality level is set to DNU for option-1 and DUS for option-2. You can configure the network options, option-1 and option-2 at the [edit chassis synchronization network-option] hierarchy level.

    To avoid source looping on the selected active source—primary or secondary source, whichever is active—even when ESMC transmit is not enabled, a DNU ESMC message is sent out when the network-option statement is configured as option-1, and a DUS ESMC message is sent out when the network-option statement is configured as option-2. This is applicable only for clock sources configured on the Ethernet interfaces.

    To configure the quality level, execute the set chassis synchronization source interfaces interface-name) quality-level (prc | prs |sec | smc | ssu-a | ssu-b | st2 | st3 | st3e | st4 | stu | tnc) configuration command or the set chassis synchronization source interfaces external quality-level (prc | prs |sec | smc | ssu-a | ssu-b | st2 | st3 | st3e | st4 | stu | tnc) configuration command at the [edit] hierarchy level.

ESMC Packet Transmit

You can enable all the interfaces or configure one or more qualifying interfaces on which to permit ESMC transmit messages by executing the set chassis synchronization esmc-transmit interfaces (all |interface-name) configuration command at the [edit] hierarchy level.

Global Wait To Restore

Starting with Junos OS Release 14.2, you can globally configure the time in minutes for source ports to be up before opening the Ethernet Synchronization Message Channel (ESMC) for messages. When a port’s signal transitions out of the signal fail state, it must be fault-free for the global wait-to-restore time before it is again considered by the clock selection process.

To configure the global wait-to-restore time, include the global-wait-to-restore statement at the [edit chassis synchronization] hierarchy level.

To override the global wait-to-restore time on a specific interface, include the wait-to-restore statement at the [edit chassis source interfaces (external-a | external-b | interface interface-name)] hierarchy level.

Maximum Transmit Quality Level

To configure the maximum transmit quality level for SCBE2 as prc, prs, sec, smc, ssu-a, ssu-b, st2, st3, st3e, st4, stu, or tnc, execute the set chassis synchronization max-transmit-quality-level quality-level configuration command at the [edit] hierarchy level.

Note:

Starting from Junos OS Release 13.3, you can configure the max-transmit-quality-level statement on SCB and SCBE.

Note:

Starting from Junos OS Release 13.3, for GPS external output, when you configure the maximum transmit quality level as PRC and router is rebooted, no valid output is obtained from SCBE. However, when the maximum transmit quality level is configured to any other quality level other than PRC and the router gets rebooted, then the SCBE works normally.

Interfaces with Upstream Clock Source

You can configure the external interface to operate with a connected router for a clock source. This external interface can be configured for a clock source, which then becomes a candidate for selection as the chassis clock source by the clock source selection algorithm. You can configure several options for the external clock source interface on the SCBE and for the two external clock source interfaces on the SCBE2.

The options include E1 interface options, pulse-per-second option, the signal type for the provided reference clocks, and the T1 interface options at the [edit chassis synchronization interfaces external] hierarchy level.

The following sections explain the clock source interface parameters in detail:

E1 Interface Options

You can set the E1 interface-specific options as:

  • framing—Set the framing mode for the E1 interface as one of the following:

    • g704—G.704 framing format for E1 interfaces

    • g704-no-crc4—G.704 framing without CRC4 for E1 interfaces.

    To set the framing mode for the E1 interface, execute the set chassis synchronization interfaces external e1-options framing (g704|g704-no-crc4) configuration command at the [edit] hierarchy level for SCBE or the set chassis synchronization interfaces (external-0/0 | external-1/0) e1-options framing (g704|g704-no-crc4) configuration command at the [edit] hierarchy level for SCBE2.

    By default, the g704 framing format is selected.

  • line-encoding—Set the line-encoding statement as automatic mark inversion or high-density bipolar 3 code. The line encoding technique converts signals to bipolar pulses. You can set the line-encoding option as one of the following:

    • ami—Automatic mark inversion

    • hdb3—High-density bipolar 3 code

    To configure the line-encoding statement on the E1 interface, execute the set chassis synchronization interfaces external e1-options line-encoding (ami|hdb3) configuration command for SCBE at the [edit] hierarchy level or the set chassis synchronization interfaces (external-0/0 | external-1/0) e1-options line-encoding (ami|hdb3) configuration command at the [edit] hierarchy level for SCBE2.

    By default, the hdb3 line encoding technique is selected.

  • sabit—Set the SA bit to a value from 4 through 8. SA bits are used for exchanging the SSM quality between the clock source and the router on the E1 interface.

    To set the SA bit on the E1 interface, execute the set chassis synchronization interfaces external e1-options sabit sabit-value configuration command at the [edit] hierarchy level for SCBE or the set chassis synchronization interfaces (external-0/0 | external-1/0) e1-options sabit sabit-value configuration command at the [edit] hierarchy level for SCBE2.

Pulse Per Second

You can enable the pulse-per-second-enable option on the GPS interface to receive the pulse per second (PPS) signal by executing the set chassis synchronization interfaces external pulse-per-second-enable configuration command at the [edit] hierarchy level for SCBE or the set chassis synchronization interfaces (external-0/0 | external-1/0) pulse-per-second-enable configuration command at the [edit] hierarchy level for SCBE2.

Signal Type

You can set the frequency for the provided reference clock (GPS or BITS) as one of the following:

  • 1mhz—Set the signal with a clock frequency of 1 MHz.

  • 5mhz—Set the signal with a clock frequency of 5 MHz.

  • 10mhz—Set the signal with a clock frequency of 10 MHz.

  • 2048khz—Set the signal with a clock frequency of 2048 kHz.

  • e1—Set the signal as an E1-coded 2048 kHz signal on a 120-ohm balanced line.

  • t1—Set the signal as a T1-coded 1.544 MHz signal on a 100-ohm balanced line.

Configure the signal type by executing the set chassis synchronization interfaces external signal-type (1mhz | 5mhz | 10mhz | 2048khz | e1 | t1) configuration command at the [edit] hierarchy level for SCBE or the set chassis synchronization interfaces (external-0/0 | external-1/0) signal-type (1hz | 5mhz | 10mhz | 2048khz | e1 | t1) configuration command at the [edit] hierarchy level for SCBE2.

The 1mhz, 5mhz, and the 10mhz signals are traceable to a GPS-capable clock source, where the source can be an atomic clock. The e1 and t1 signals are traceable to a BITS clock source.

T1 Interface Options

You can set the T1 interface-specific options as:

  • framing—Set the framing mode for the T1 interface as one of the following:

    • esf—Extended superframe

    • sf—Superframe

    To set the framing mode for the T1 interface, execute the set chassis synchronization interfaces external t1-options framing (esf|sf) configuration command at the [edit] hierarchy level for SCBE or the set chassis synchronization interfaces (external-0/0 | external-1/0) t1-options framing (esf|sf) configuration command at the [edit] hierarchy level for SCBE2.

    By default, the esf framing mode is selected.

  • line-encoding—Set the line-encoding option on the T1 interface as one of the following:

    1. ami—Automatic mark inversion

    2. b8zs—8-bit zero suppression

    To configure the line-encoding option on the T1 interface, execute the set chassis synchronization interfaces external t1-options line-encoding (ami|b8zs) configuration command at the [edit] hierarchy level for SCBE or the set chassis synchronization interfaces (external-0/0 | external-1/0) t1-options line-encoding (ami|b8zs) configuration command at the [edit] hierarchy level for SCBE2.

    By default, the b8z3 line encoding technique is selected.

External Output Interface

You can set several options for the external clock output interface for SCBE or for the two external clock output interfaces for SCBE2.

The options include disabling the holdover mode; configuring a minimum quality threshold; configuring a mode to select a clock source; configuring the transmit quality level to DNU or DUS; and disabling wander filtering at the [edit chassis synchronization output interfaces external] hierarchy level for SCBE or at the [edit chassis synchronization output interfaces (external0-0 | external-1/0)] hierarchy level for SCBE2.

The following sections explain the external output interface parameters in detail:

Holdover Mode

You can disable the holdover mode on the external output interface by executing the set chassis synchronization output interfaces external holdover-mode-disable configuration command at the [edit] hierarchy level for SCBE or the set chassis synchronization output interfaces (external-0/0 | external-1/0) holdover-mode-disable configuration command at the [edit] hierarchy level for SCBE2.

Minimum Quality

When the quality of the source signal—used to derive the output—falls below a minimum quality level, the output of the external interface is placed in holdover mode. When the signal type supports the SSM quality level, the SSM quality level is set as the holdover quality level. The output interface remains in holdover mode until a source with the minimum quality level or higher is available. Note that when the holdover-mode-disable option is configured, the output is suppressed completely.

You can set the minimum quality on the external output interface as prc, prs, sec, smc, ssu-a, ssu-b, st2, st3, st3e, st4, stu, or tnc by executing the set chassis synchronization output interfaces external minimum-quality quality-level configuration command at the [edit] hierarchy level for SCBE or the set chassis synchronization output interfaces (external-0/0 | external-1/0) minimum-quality quality-level configuration command at the [edit] hierarchy level for SCBE2.

Source Mode

When the source mode is set to chassis, the source selected by the chassis clock module is used as the clock source. When the source mode is set to line, the best available line clock is selected.

You can set the source mode for selecting a clock source as either a chassis clock or the best line clock source as output by executing the set chassis synchronization output interfaces external source-mode (chassis|line) configuration command at the [edit] hierarchy level for SCBE or the set chassis synchronization output interfaces (external-0/0 | external-1/0) source-mode (chassis|line) configuration command at the [edit] hierarchy level for SCBE2.

Transmit Quality Level

You can configure the tx-dnu-to-line-source-enable statement to enable the transmit quality level to DNU or DUS when the chassis clock is the BITS input signal and when a valid line source signal is sent out through the BITS output.

You can set the transmitting quality level to DNU or DUS on the line source interface by executing the set chassis synchronization output interfaces external tx-dnu-to-line-source-enable configuration command at the [edit] hierarchy level for SCBE or the set chassis synchronization output interfaces (external-0/0 | external-1/0) tx-dnu-to-line-source-enable configuration command at the [edit] hierarchy level at SCBE2.

Wander Filter

You can disable the wander filter by executing the set chassis synchronization output interfaces external wander-filter-disable configuration command at the [edit] hierarchy level for SCBE or the set chassis synchronization output interfaces (external-0/0 | external-1/0) wander-filter-disable configuration command at the [edit] hierarchy level for SCBE2.

Clock Synchronization Ports

Starting with Junos OS Release 13.3, you can set the time-of-day-format statement as an ASCII string on SCBE and SCBE2 by executing the set chassis synchronization port auxiliary client time-of-day-format ascii string configuration command at the [edit] hierarchy level.

The time of day (TOD) format is specified as a string of ASCII characters. The TOD format string contains information that specifies which ASCII characters to match, which ASCII characters to ignore, and which ASCII characters to translate to particular time units (such as month, day, hour, minute, and so on).

The TOD format string specifies how the incoming string is to be parsed so that the information embedded can be extracted. The format of the TOD option can be executed with the set chassis synchronization port auxiliary time-of-day-format ascii string configuration command at the [edit] hierarchy level, where the format of the data string is $GPRMC,%hh%mm%ss,^,^^^^.^^,^,^^^^^^^^,^,^^^^^,^^^^^,%DD%MM%YY,^^^^^,^*^^.

Table 3 explains pattern-matching characters used in the TOD data string.

Table 3: Pattern-Matching Characters

Character construct

Number of characters

Description

-

1

The DO NOT CARE (DNC) character

%hh

2

Hours (00–23)

%mm

2

Minutes (00–59)

%ss

2

Seconds (00–59)

%DD

2

Day (01–31)

%MM

2

Month (01–12)

%YY

2

Year without century

%YYY

4

Year with century

%DDD

3

Day of year (001–366)

%MMM

3

Month of year (JAN, FEB, etc.)

%cc

2

NMEA message checksum

%Q

1

Time quality indicator (‘ ‘ = valid ‘*’ = error)

There are several patterns that can be received by a router. The following pattern shows an example of a received TOD data string (as defined in the National Marine Electronics Association (NMEA) 0183 standard. The data string is called the Recommended Minimum Specific GPS/Transit Data (RMC) message.) and Table 4 explains it in detail.

Table 4: Received TOD Data String

Pattern

Description

$GPRMC

NMEA sentence ID

225446

UTC time of fix (22:54:46 UTC)

A

Data status (A=Valid position, V=navigation receiver warning)

4916.45

Latitude of fix

N

N or S of longitude

12311.12

Longitude of fix

W

E or W of longitude

000.5

Speed over ground in knots

054.7

Track made good in degrees True

191194

UTC date of fix (19 November 1994)

020.3

Magnetic variation degrees

E

E or W of magnetic variation

*68

Checksum (XOR of all characters between $ and *)

Note:

Whenever a TOD data string does not provide sufficient information, the router extracts it from Junos OS and generates a log message. The TOD data string that is either transmitted or received is always of fixed length and is delimited by a <CR><LF>character pair, where CR (carriage return) and LF (line feed) are the line break types used to end the ASCII format string.

MIC-Level Framing Mode

You can configure the LAN framing mode on the 10-Gigabit Ethernet MIC with XFP by executing the set chassis fpc fpc-slot pic pic-slot framing lan at the [edit] hierarchy level.

Note that to operate in LAN framing mode on the 10-Gigabit Ethernet MIC with XFP, you must configure the interface framing mode on the MIC interface. Execute the set interfaces xe-fpc/pic/port framing-mode (lan-phy | wan-phy) configuration command at the [edit] hierarchy level, where the lan-phy option denotes a 802.3ae 10-Gbps LAN-mode interface and the wan-phy option denotes a 802.3ae 10-Gbps WAN-mode interface.

Change History Table

Feature support is determined by the platform and release you are using. Use Feature Explorer to determine if a feature is supported on your platform.

Release
Description
17.3
Starting with Junos OS Release 17.3, MX 10003 routers support external clock synchronization and automatic clock selection for Synchronous Ethernet, T1 or E1 line timing sources, and external inputs.
14.2
Starting with Junos OS Release 14.2, MX Series and PTX Series routers support external clock synchronization and automatic clock selection for Synchronous Ethernet, T1 or E1 line timing sources, and external inputs.
14.2
Starting with Junos OS Release 14.2, note that on PTX Series routers, you can specify the primary and secondary clock sources provided the clock source meets the necessary qualification as set by the clock algorithm.
14.2
Starting with Junos OS Release 14.2, you can configure hold-off time for Synchronous Ethernet interfaces and external clock source interfaces to prevent rapid successive switching between signal fail states.
14.2
Starting with Junos OS Release 14.2, you can globally configure the time in minutes for source ports to be up before opening the Ethernet Synchronization Message Channel (ESMC) for messages.
13.3
Starting from Junos OS Release 13.3, the Enhanced Switch Control Board—SCBE2—supports centralized clocking mode and has two external clock interfaces external-0/0 and external-1/0.
13.3
Starting from Junos OS Release 13.3, you can configure the max-transmit-quality-level statement on SCB and SCBE.
13.3
Starting from Junos OS Release 13.3, for GPS external output, when you configure the maximum transmit quality level as PRC and router is rebooted, no valid output is obtained from SCBE.
13.3
Starting with Junos OS Release 13.3, you can set the time-of-day-format statement as an ASCII string on SCBE and SCBE2 by executing the set chassis synchronization port auxiliary client time-of-day-format ascii string configuration command at the [edit] hierarchy level.
12.2
Starting from Junos OS Release 12.2, the Enhanced Switch Control Board—SCBE—supports centralized clocking mode and has one external clock interface.
12.2
Starting with Junos OS Release 12.2R1, configuring the quality level for a Synchronous Ethernet interface is optional when the quality-mode-enable and the selection-mode received-quality statements are included at the [edit chassis synchronization] hierarchy level.
11.2-13.3
For Junos OS Releases 11.2R4 through 13.3R3 for MX240, MX480, MX960, MX2010, and MX2020 with SCB, SCBE or SCBE2, you must execute some specific commands after you change the network option at the [edit chassis synchronization] hierarchy level.