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CoS on Ethernet IQ2 and Enhanced IQ2 PICs Feature Guide for Routing Devices

Junos OS Class of Service Library for Routing Devices

Overview
Configuration
Administration
Troubleshooting

CoS on Ethernet IQ2 and Enhanced IQ2 PICs

CoS on Enhanced IQ2 PICs Overview

CoS Capabilities and Limitations on IQ2 and IQ2E PICs (M Series and T Series Platforms)

Setting the Number of Egress Queues on IQ2 and Enhanced IQ2 PICs

Shaping Granularity Values for Enhanced Queuing Hardware

Understanding Burst Size Configuration on IQ2 and IQ2E Interfaces

Differences Between Gigabit Ethernet IQ and Gigabit Ethernet IQ2 PICs

CoS for L2TP Tunnels on Ethernet Interface Overview

CoS on Ethernet IQ2 and Enhanced IQ2 PICs
CoS on Enhanced IQ2 PICs Overview CoS Capabilities and Limitations on IQ2 and IQ2E PICs (M Series and T Series Platforms) Setting the Number of Egress Queues on IQ2 and Enhanced IQ2 PICs Shaping Granularity Values for Enhanced Queuing Hardware Understanding Burst Size Configuration on IQ2 and IQ2E Interfaces Differences Between Gigabit Ethernet IQ and Gigabit Ethernet IQ2 PICs CoS for L2TP Tunnels on Ethernet Interface Overview

CoS on Ethernet IQ2 and Enhanced IQ2 PICs

CoS on Enhanced IQ2 PICs Overview

CoS Capabilities and Limitations on IQ2 and IQ2E PICs (M Series and T Series Platforms)

Setting the Number of Egress Queues on IQ2 and Enhanced IQ2 PICs

Shaping Granularity Values for Enhanced Queuing Hardware

Understanding Burst Size Configuration on IQ2 and IQ2E Interfaces

Differences Between Gigabit Ethernet IQ and Gigabit Ethernet IQ2 PICs

CoS for L2TP Tunnels on Ethernet Interface Overview

Configuration Tasks
Configuring Rate Limits on IQ2 and Enhanced IQ2 PICs Configuring Burst Size for Shapers on IQ2 and IQ2E Interfaces Configuring Shaping on 10-Gigabit Ethernet IQ2 PICs Configuring Traffic Control Profiles for Shared Scheduling and Shaping Configuring a Separate Input Scheduler for Each Interface Configuring Per-Unit Scheduling for GRE Tunnels Using IQ2 and IQ2E PICs Configuring Hierarchical Input Shapers Configuring a Policer Overhead Configuring CoS for L2TP Tunnels on Ethernet Interfaces Configuring LNS CoS for Link Redundancy

Configuration Tasks

Configuring Rate Limits on IQ2 and Enhanced IQ2 PICs

Configuring Burst Size for Shapers on IQ2 and IQ2E Interfaces

Configuring Shaping on 10-Gigabit Ethernet IQ2 PICs

Configuring Traffic Control Profiles for Shared Scheduling and Shaping

Configuring a Separate Input Scheduler for Each Interface

Configuring Per-Unit Scheduling for GRE Tunnels Using IQ2 and IQ2E PICs

Configuring Hierarchical Input Shapers

Configuring a Policer Overhead

Configuring CoS for L2TP Tunnels on Ethernet Interfaces

Configuring LNS CoS for Link Redundancy

Examples
Example: Configuring a CIR and a PIR on Ethernet IQ2 Interfaces Example: Configuring Shared Resources on Ethernet IQ2 Interfaces Example: L2TP LNS CoS Support for Link Redundancy

Examples

Example: Configuring a CIR and a PIR on Ethernet IQ2 Interfaces

Example: Configuring Shared Resources on Ethernet IQ2 Interfaces

Example: L2TP LNS CoS Support for Link Redundancy

Configuration Statements
delay-buffer-rate egress-policer-overhead excess-rate guaranteed-rate ingress-policer-overhead input-scheduler-map input-shaping-rate (Logical Interface) input-shaping-rate (Physical Interface) input-traffic-control-profile interfaces max-queues-per-interface output-traffic-control-profile scheduler-map (Interfaces and Traffic-Control Profiles) schedulers (Class of Service) shaping-rate (Applying to an Interface) shaping-rate (Limiting Excess Bandwidth Usage) shaping-rate (Oversubscribing an Interface) shared-instance traffic-control-profiles transmit-rate (Schedulers) unit per-unit-scheduler shared-scheduler

Configuration Statements

delay-buffer-rate

egress-policer-overhead

excess-rate

guaranteed-rate

ingress-policer-overhead

input-scheduler-map

input-shaping-rate (Logical Interface)

input-shaping-rate (Physical Interface)

input-traffic-control-profile

interfaces

max-queues-per-interface