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Frame Relay DLCI Limitations for Channelized IQ Interfaces

If you use Frame Relay encapsulation on a channelized interface, see Table 7 on page 8 for the maximum number of data-link connection identifiers (DLCIs) per channel that you can configure at each channel level for various channelized PICs.

Note: The actual number of DLCIs you can configure for each channel is determined by the capabilities of your system, such as the number and type of PICs installed. If the number of DLCIs in the configuration exceeds the capabilities of your system, the router might not be able to support the maximum DLCI values shown in Table 7 on page 8. To determine the capabilities of your system, contact Juniper Networks customer support.

Table 1: Frame Relay DLCI Limitations for Channelized Interfaces

Channelized PIC Type

  
Original Channelized PICsNumber of DLCIs per LevelRange

T3 and T1 level channels

64 for regular mode

3 for sparse mode

0–63 for regular mode

1–1022 for sparse mode (0 is reserved for the Local Management Interface or LMI)

DS0 level channels

3 for sparse mode

1–1022 for sparse mode (0 is reserved for LMI)

Channelized IQ PICsNumber of DLCIs per LevelRange

OC12 level channels
(Channelized OC12 IQ PIC)

64

1–1022 (0 is reserved for LMI)

OC3 level channels
(Channelized OC12 IQ and Channelized OC3 IQ PICs)

64

1–1022 (0 is reserved for LMI)

T3 level channel
(Channelized OC12 IQ, Channelized OC3 IQ, and Channelized DS3 IQ PICs)

256

1–1022 (0 is reserved for LMI)

STM1 level channel
(Channelized STM1 IQ PIC)

64

1–1022 (0 is reserved for LMI)

E1 level channels
(Channelized STM1 IQ and Channelized E1 IQ PICs)

64

1–1022 (0 is reserved for LMI)

T1 level channels
(Channelized OC12 IQ, Channelized OC3 IQ, Channelized DS3 IQ, and Channelized T1 IQ PICs)

64

1–1022 (0 is reserved for LMI)

DS0 level channels (Channelized OC12 IQ, Channelized OC3 IQ, Channelized DS3 IQ, Channelized T1 IQ, Channelized STM1 IQ, and Channelized E1 IQ PICs)

16

1–1022 (0 is reserved for LMI)

Published: 2012-11-28