Related Documentation
- J, M, MX, PTX, T Series
- Platform Support for Priority Scheduling
- M, MX, PTX, T Series
- Applying Classifiers to Logical Interfaces
- Setting Packet Loss Priority
- M, T Series
- CoS Capabilities and Limitations on IQ2 and IQ2E PICs (M Series and T Series Platforms)
- MX Series
- CoS Capabilities and Limitations on MIC and MPC Interfaces
Hardware Capabilities and Limitations
For basic MX Series router architecture information, see Packet Flow on MX Series 3D Universal Edge Routers. For CoS hardware capabilities about other routers, see these sections:
CoS Hardware Capabilities and Limitations on M Series and T Series Routers
Juniper Networks M320 Multiservice Edge Routers and T Series Core Routers, as well as M Series Multiservice Edge Routers with enhanced Flexible PIC Concentrators (FPCs), have more CoS capabilities than M Series routers that use other FPC models. Table 1 lists some of these the differences.
To determine whether your M Series router is equipped with an enhanced FPC, issue the show chassis hardware command. The presence of an enhanced FPC is designated by the E-FPC description in the output.
user@host> show chassis hardware
Hardware inventory: Item Version Part number Serial number Description Chassis 31959 M7i Midplane REV 02 710-008761 CA0209 M7i Midplane Power Supply 0 REV 04 740-008537 PD10272 AC Power Supply Routing Engine REV 01 740-008846 1000396803 RE-5.0 CFEB REV 02 750-009492 CA0166 Internet Processor IIv1 FPC 0 E-FPC PIC 0 REV 04 750-003163 HJ6416 1x G/E, 1000 BASE-SX PIC 1 REV 04 750-003163 HJ6423 1x G/E, 1000 BASE-SX PIC 2 REV 04 750-003163 HJ6421 1x G/E, 1000 BASE-SX PIC 3 REV 02 750-003163 HJ0425 1x G/E, 1000 BASE-SX FPC 1 E-FPC PIC 2 REV 01 750-009487 HM2275 ASP - Integrated PIC 3 REV 01 750-009098 CA0142 2x F/E, 100 BASE-TX
Many operations involving the DSCP bits depend on the router and PIC type. For example, some DSCP classification configurations for MPLS and Internet can only be performed on M120 routers, M320 routers with Enhanced Type III FPCs, and MX Series routers only.
Table 1 summarizes CoS features and limitations on M Series and T Series routers,
![]() | Note: The T4000 router supports the lowest of the scaling numbers for classifiers, rewrite rules, and WRED associated with MX Series and T Series routers. |
Table 1: CoS Features and Limitations on M Series and T Series Routers
Feature | Interface Hardware | Details | |||
---|---|---|---|---|---|
FPCs in M120 Routers | Enhanced FPCs in M120 Routers | FPCs in M320 or T Series Routers | Type-4 or Enhanced Scaling FPCs in T Series Routers | ||
Classifiers | |||||
Maximum number per FPC or PIC | 1 | 8 | 64 | 64 or 58 total | On IQ2 and IQ2E PICs, the CoS classification and CoS rewrite processes are off-loaded from the FPC to the PIC, so the capabilities and limitations of these types of PICs must be taken into consideration. For M Series router FPCs, the one-classifier limit includes the default IP precedence classifier. If you create a new classifier and apply it to an interface, the new classifier does not override the default classifier for other interfaces on the same FPC. In general, the first classifier associated with a logical interface is used. The default classifier can be replaced only when a single interface is associated with the default classifier. Only 58 user-configurable BA classifiers can be attached to logical interfaces on Type-4 FPCs in T640, T1600, or T4000 routers, because six default classifiers are automatically attached to the interfaces. When interfaces on the FPC come up, three default classifiers are installed in the FPC ASIC table: IPv4 and IPv6, MPLS tagging, and multiservices. Next, three default BA classifiers are installed: DSCP IPv6 (9), and MPLS EXP (10), and IP precedence (13). For user-defined BA classifier types (dscp, dscp-ipv6, ieee-802.1p, ieee-802.1ad, inet-precedence, and mpls-exp), you can attach a maximum of 32 classifiers of the same type (including one default classifier) to a logical interface hosted on a Type-4 FPC in a T640, T1600, or T4000 router. You can attach a maximum of 8 user-configured BA classifiers of the same type to a logical interface hosted on an Enhanced Scaling FPC in a T640, T1600, or T4000 router. |
dscp | No | Yes | Yes | Yes | On all routers, you cannot configure IP precedence and DiffServ code point (DSCP) classifiers on a single logical interface, because both apply to IPv4 packets. |
dscp-ipv6 | No | Yes | Yes | Yes | For T Series routers, you can apply separate classifiers for IPv4 and IPv6 packets per logical interface. For M Series router enhanced FPCs, you cannot apply separate classifiers for IPv4 and IPv6 packets. Classifier assignment works as follows:
|
ieee-802.1p | No | Yes | Yes | Yes | On M Series router enhanced FPCs and T Series routers, if you associate an IEEE 802.1p classifier with a logical interface, you cannot associate any other classifier with that logical interface. For most PICs, if you apply an IEEE 802.1p classifier to a logical interface, you cannot apply non-IEEE classifiers on other logical interfaces on the same physical interface. This restriction does not apply to Gigabit Ethernet IQ2 PICs. |
inet-precedence | Yes | Yes | Yes | Yes | On all routers, you cannot assign IP precedence and DSCP classifiers to a single logical interface, because both apply to IPv4 packets. |
mpls-exp | Yes | Yes | Yes | Yes | For M Series router FPCs, only the default MPLS EXP classifier is supported; the default MPLS EXP classifier takes the EXP bits 1 and 2 as the output queue number. |
Loss priorities based on the Frame Relay discard eligible (DE) bit | No | No | No | No | – |
Drop Profiles | |||||
Maximum number per FPC or PIC | 2 | 16 | 32 | 32 | – |
Per queue | No | Yes | Yes | Yes | – |
Per loss priority | Yes | Yes | Yes | Yes | – |
Per Transmission Control Protocol (TCP) bit | No | Yes | Yes | Yes | – |
Policing | |||||
Adaptive shaping for Frame Relay traffic | No | No | No | No | – |
Traffic policing | Yes | Yes | Yes | Yes | – |
Two-rate tricolor marking (TCM) | No | No | Yes | Yes | Allows you to configure up to four loss priorities. Two-rate TCM is supported on T Series routers with Enhanced II FPCs and the T640 Core Router with Enhanced Scaling FPC4. |
Virtual channels | No | No | No | No | – |
Queuing | |||||
Priority | Yes | No | Yes | Yes | Gigabit Ethernet IQ2 PICs support only one queue in the scheduler map with medium-high, high, or strict-high priority. If more than one queue is configured with high or strict-high priority, the one that appears first in the configuration is implemented as strict-high priority. This queue receives unlimited transmission bandwidth. The remaining queues are implemented as low priority, which means they might be starved. On the IQE PIC, you can rate-limit the strict-high and high queues. Without this limiting, traffic that requires low latency (delay) such as voice can block the transmission of medium-priority and low-priority packets. Unless limited, high and strict-high traffic is always sent before lower priority traffic. Support for the medium-low and medium-high queuing priority mappings varies by FPC type. |
Per-queue output statistics | No | Yes | Yes | Yes | Per-queue output statistics are shown in the output of the show interfaces queue command. |
Rewrite Markers | |||||
Maximum number per FPC or PIC | No maximum | No maximum | 64 | 64 | On IQ2 and IQ2E PICs, the CoS classification and CoS rewrite processes are off-loaded from the FPC to the PIC, so the capabilities and limitations of these types of PICs must be taken into consideration. |
dscp | No | Yes | Yes | Yes | For M Series Enhanced FPCs, bits 0 through 5 are rewritten, and bits 6 through 7 are preserved. For M320 and T Series router non-IQ FPCs, bits 0 through 5 are rewritten, and bits 6 through 7 are preserved. For M320 and T Series router FPCs, you must decode the loss priority using the firewall filter before you can use loss priority to select the rewrite CoS value. For M320 and T Series router FPCs, Adaptive Services PIC link services IQ interfaces (lsq-) do not support DSCP rewrite markers. |
dscp-ipv6 | No | Yes | Yes | Yes | For M Series router Enhanced FPCs and M320 and T Series router FPCs, bits 0 through 5 are rewritten, and bits 6 through 7 are preserved. For M320 and T Series routers FPCs, you must decode the loss priority using the firewall filter before you can use loss priority to select the rewrite CoS value. For M320 and T Series router FPCs, Adaptive Services PIC link services IQ interfaces (lsq-) do not support DSCP rewrite markers. |
frame-relay-de | No | No | No | No | – |
ieee-802.1 | No | Yes | Yes | Yes | For M Series router enhanced FPCs and T Series router FPCs, fixed rewrite loss priority determines the value for bit 0; queue number (forwarding class) determines bits 1 and 2. For IQ PICs, you can only configure one IEEE 802.1 rewrite rule on a physical port. All logical ports (units) on that physical port should apply the same IEEE 802.1 rewrite rule. |
inet-precedence | Yes | Yes | Yes | Yes | For M Series router FPCs, bits 0 through 2 are rewritten, and bits 3 through 7 are preserved. For M Series router Enhanced FPCs, bits 0 through 2 are rewritten, bits 3 through 5 are cleared, and bits 6 through 7 are preserved. For M320 and T Series routers FPCs, bits 0 through 2 are rewritten and bits 3 through 7 are preserved. For M320 and T Series router FPCs, you must decode the loss priority using the firewall filter before you can use loss priority to select the rewrite CoS value. |
mpls-exp | Yes | Yes | Yes | Yes | For M320 and T Series router FPCs, you must decode the loss priority using the firewall filter before you can use loss priority to select the rewrite CoS value. For M Series routers FPCs, fixed rewrite loss priority determines the value for bit 0; queue number (forwarding class) determines bits 1 and 2. |
CoS Hardware Capabilities and Limitations on PTX Series Packet Transport Switches
Table 2: CoS Hardware Capabilities and Limitations on PTX Series Packet Transport Switches
Feature | PTX Series | Comments | |||
---|---|---|---|---|---|
Classifiers | |||||
Maximum number per PFE | 64 | L2 classifiers (sum of ieee-802.1 + ieee-802.1ad cannot exceed 32) DSCP and inet-precedence classifiers (sum of dscp + inet-precedence classifiers cannot exceed 32) dscp-ipv6 classifiers exp classifiers | |||
dscp | Yes | DSCP and IP precedence classifiers cannot be configured on the same logical interface. | |||
dscp-ipv6 | Yes | Separate classifiers can be applied for IPv4 and IPv6 packets per logical interface. | |||
ieee-802.1p | Yes | You can associate ieee-802.1p with any other type of classifier on the same logical interface. For L3 packets, an L3 classifier takes precedence over an IEEE classifier. | |||
inet-precedence | Yes | ||||
mpls-exp | Yes | ||||
Loss priorities based on the Frame Relay discard eligible (DE) bit | No | ||||
Drop Profiles | |||||
Maximum number | 32 | You can configure up to 32 drop profiles in the PTX chassis. | |||
Per queue | Yes | ||||
Per loss priority | Yes | ||||
Per Transmission Control Protocol (TCP) bit | No | ||||
Policing | |||||
Traffic policing | Yes | ||||
Two-rate tricolor marking (TCM) | Yes | ||||
Queuing | |||||
Priority | Yes (4) | ||||
Per-queue output statistics | Yes | Red-dropped counters are not maintained per drop precedence. Also tail drop counters always show zero because packets are always dropped by the RED algorithm. | |||
Rewrite Markers | |||||
Maximum number per PFE | 64 | The sum of L2 and L3 rewrite rules cannot exceed 64. | |||
dscp | Yes | ||||
dscp-ipv6 | Yes | ||||
ieee-802.1 | Yes | L2 and L3 rewrites can be applied to the same packet simultaneously. | |||
inet-precedence | No | ||||
mpls-exp | Yes |
Related Documentation
- J, M, MX, PTX, T Series
- Platform Support for Priority Scheduling
- M, MX, PTX, T Series
- Applying Classifiers to Logical Interfaces
- Setting Packet Loss Priority
- M, T Series
- CoS Capabilities and Limitations on IQ2 and IQ2E PICs (M Series and T Series Platforms)
- MX Series
- CoS Capabilities and Limitations on MIC and MPC Interfaces
Published: 2013-10-03
Related Documentation
- J, M, MX, PTX, T Series
- Platform Support for Priority Scheduling
- M, MX, PTX, T Series
- Applying Classifiers to Logical Interfaces
- Setting Packet Loss Priority
- M, T Series
- CoS Capabilities and Limitations on IQ2 and IQ2E PICs (M Series and T Series Platforms)
- MX Series
- CoS Capabilities and Limitations on MIC and MPC Interfaces