Supported Platforms
Related Documentation
- PTX Series
- PTX5000 Hardware Component Overview
- PTX5000 Field-Replaceable Units
- PTX5000 PIC Description
- PTX5000 Centralized Clock Generator Description
- Clock Sources for PTX Series Packet Transport Routers
- Understanding Ethernet Interfaces for PTX Series Packet Transport Routers
- Additional Information
- PTX5000 Packet Transport Router Hardware Guide
Platform Components for PTX Series Packet Transport Routers
The PTX Series Packet Transport Routers are a portfolio of high-performance platforms designed for the service provider supercore. These switches deliver powerful capabilities based on innovative silicon and a forwarding architecture focused on MPLS and Ethernet. PTX Series Packet Transport Routers deliver several critical core functionalities, including industry-leading density and scalability, cost optimization, high availability, and network simplification.
The Junos OS chassis management software for the PTX Series Packet Transport Routers provides enhanced environmental monitoring and field-replaceable unit (FRU) control. Chassis management delivers: a faster master switchover, enhanced power budgeting with modular power management, reduced power consumption for partially populated systems, granular control over FRU power-on, multizone cooling with better fan speed control for reduced noise, and CPU leveling during monitoring intervals.
System clocking is controlled by centralized clock generators (CCGs) that provide a 19.44-MHz Stratum 3 clock signal. The CCG can derive a master clock from a valid source and synchronize all interfaces on the chassis to this master clock.
The modular power design allows power efficiency on the order of 1 watt per Gbps. Power supply modules (PSMs) regulate zone power and provide power to specific FRUs in the system. Power distribution units (PDUs) distribute zone power. Customers can use only as much power required for their chassis depending on the number of FRUs present.
The chassis has separate cooling chambers. Fans operating in one chamber have no impact on cooling in another chamber, enabling the chassis to run fans at different speeds in different chambers. The chassis can coordinate FRU temperatures in each zone and the fan speeds of the fan trays in these zones.
Table 1: Maximum FRUs supported on the PTX5000 Packet Transport Router
| FRU | Maximum Number |
|---|---|
| Routing Engines | 2 |
| Control Board (CB) | 2 |
| Power distribution unit (PDU) | 2 |
| Power supply module (PSM) | 4 per PDU |
| Fan | 3 |
| FPC | 8 |
| PIC | 2 per FPC |
| Switch Interface Board (SIB) | 9 |
| Craft Interface (FPD) | 1 |
| Centralized clock generator (CCG) | 2 |
Related Documentation
- PTX Series
- PTX5000 Hardware Component Overview
- PTX5000 Field-Replaceable Units
- PTX5000 PIC Description
- PTX5000 Centralized Clock Generator Description
- Clock Sources for PTX Series Packet Transport Routers
- Understanding Ethernet Interfaces for PTX Series Packet Transport Routers
- Additional Information
- PTX5000 Packet Transport Router Hardware Guide
Published: 2013-07-18
Supported Platforms
Related Documentation
- PTX Series
- PTX5000 Hardware Component Overview
- PTX5000 Field-Replaceable Units
- PTX5000 PIC Description
- PTX5000 Centralized Clock Generator Description
- Clock Sources for PTX Series Packet Transport Routers
- Understanding Ethernet Interfaces for PTX Series Packet Transport Routers
- Additional Information
- PTX5000 Packet Transport Router Hardware Guide
