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Applying Scheduler Maps and Shaping Rate to Physical Interfaces on IQ PICs

For IQ PICs, you can configure physical interfaces to shape traffic based on the rate-limited bandwidth of the total interface bandwidth. This allows you to shape the output of the physical interface, so that the interface transmits less traffic than it is physically capable of carrying.

If you do not configure a shaping rate on the physical interface, the default physical interface bandwidth is based on the channel bandwidth and the time slot allocation.

Note: The shaping-rate statement cannot be applied to a physical interface on J Series routers.

To configure shaping on the interface, include the shaping-rate statement at the [edit class-of-service interfaces interface-name] hierarchy level:

[edit class-of-service interfaces interface-name]shaping-rate rate;

You can specify a peak bandwidth rate in bps, either as a complete decimal number or as a decimal number followed by the abbreviation k (1000), m (1,000,000), or g (1,000,000,000). For physical interfaces, the range is from 1000 through 160,000,000,000 bps. For the IQ2 Gigabit Ethernet PIC, the minimum is 80,000 bps, and for the IQ2 10 Gigabit Ethernet PIC, the minimum is 160,000 bps. (For logical interfaces, the range is 1000 through 32,000,000,000 bps.) The sum of the bandwidths you allocate to all physical interfaces on a PIC must not exceed the bandwidth of the PIC.

Note: For MX Series routers, the shaping rate value for the physical interface at the [edit class-of-service interfaces interface-name] hierarchy level must be a minimum of 160 Kbps.

If you configure a shaping rate that exceeds the physical interface bandwidth, the new configuration is ignored, and the previous configuration remains in effect. For example, if you configure a shaping rate that is 80 percent of the physical interface bandwidth, then change the configuration to 120 percent of the physical interface bandwidth, the 80 percent setting remains in effect. This holds true unless the PIC is restarted, in which case the default bandwidth goes into effect. As stated previously, the default bandwidth is based on the channel bandwidth and the time slot allocation.

Optionally, you can instead configure scheduling and rate shaping on logical interfaces, as described in Applying Scheduler Maps and Shaping Rate to DLCIs and VLANs. In general, logical and physical interface traffic shaping is mutually exclusive. You can include the shaping-rate statement at the [edit class-of-service interfaces interface-name] hierarchy level or the [edit class-of-service interfaces interface-name unit logical-unit-number] hierarchy level, but not both. For Gigabit Ethernet IQ2 and IQ2E PICs, you can configure hierarchical traffic shaping, meaning the shaping is performed on both the physical interface and the logical interface. For more information, see Configuring Hierarchical Input Shapers.

To view the results of your configuration, issue the following show commands:

  • show class-of-service interface interface-name
  • show interfaces interface-name extensive
  • show interfaces queue

For more information, see the following sections:

Shaping Rate Calculations

For shaping rate and WRR, the information included in the calculations varies by PIC type, as shown in Table 1.

Note: The 10-port 10-Gigabit Oversubscribed Ethernet (OSE) PICs and Gigabit Ethernet IQ2 PICs are unique in supporting ingress scheduling and shaping. The calculations shown for 10-port 10-Gigabit OSE and Gigabit Ethernet IQ2 PICs apply to both ingress and egress scheduling and shaping. For other PICs, the calculations apply to egress scheduling and shaping only.

For more information, see CoS on Enhanced IQ2 PICs Overview.

Table 1: Shaping Rate and WRR Calculations by PIC Type

PIC Type

Platform

Shaping Rate and WRR Calculations Include

10-port 10-Gigabit OSE PIC

T Series Core Routers

For ingress and egress:

L3 header + L2 header + frame check sequence (FCS) + interpacket gap (IPG) + preamble

Gigabit Ethernet IQ2 PIC

All

For ingress and egress:

L3 header + L2 header + frame check sequence (FCS)

Gigabit Ethernet IQ PIC

All

L3 header + L2 header + FCS

Non-IQ PIC

M320 and T Series Enhanced FPCs

L3 header + L2 header + 4-byte FCS + interpacket gap (IPG) + start-of-frame delimiter (SFD)+ preamble

T Series non-Enhanced FPCs

L3 header

Other M Series FPCs

L3 header+ L2 header

IQ PIC with a SONET/SDH interface

All

L3 header+ L2 header + FCS

Non-IQ PIC with a SONET/SDH interface

M320 and T Series Enhanced FPCs

L3 header +L2 header + 4-byte FCS + IPG + SFD + Preamble

T Series non-Enhanced FPCs

L3 header

Other M Series FPCs

L3 header+L2 header

Examples: Applying a Scheduler Map and Shaping Rate to Physical Interfaces

Applying a Shaping Rate to a Clear-Channel T1 Interface on a Channelized T1 IQ PIC

[edit interfaces]
ct1-2/1/0 {no-partition interface-type t1;}
t1-2/1/0 {unit 0 {family inet {address 10.40.1.1/30;}}}
 [edit class-of-service]
interfaces {t1-2/1/0 {shaping-rate 3000;}}

Applying a Scheduler Map and Shaping Rate to a DS0 Channel of a Channelized T1 Interface on a Channelized T1 IQ PIC

[edit interfaces]
ct1-0/0/9 {partition 1 timeslots 1-2 interface-type ds;}
ds-0/0/9:1 {no-keepalives;unit 0 {family inet {address 10.10.1.1/30;}}}
 [edit class-of-service]
interfaces {ds-0/0/9:1 {scheduler-map sched_port_1;shaping-rate 2000;}}

Applying a Shaping Rate to a Clear-Channel E1 Interface on a Channelized E1 IQ PIC

[edit interfaces]
ce1-2/1/0 {no-partition interface-type e1;}
e1-2/1/0 {unit 0 {family inet {address 10.40.1.1/30;}}}
 [edit class-of-service]
interfaces {e1-2/1/0 {shaping-rate 4000;}}

Applying a Scheduler Map and Shaping Rate to DS0 Channels of a Channelized E1 Interface on a Channelized E1 IQ PIC

[edit interfaces]
ce1-1/3/1 {partition 1 timeslots 1-4 interface-type ds;partition 2 timeslots 5-6 interface-type ds;}
ds-1/3/1:1 {no-keepalives;unit 0 {family inet {address 10.10.1.1/30;}}}
ds-1/3/1:2 {no-keepalives;unit 0 {family inet {address 10.10.1.5/30;}}}
 [edit class-of-service]
interfaces {ds-1/3/1:1 {scheduler-map sched_port_1;shaping-rate 1000;}ds-1/3/1:2 {scheduler-map sched_port_1;shaping-rate 1500;}}

Applying a Scheduler Map and Shaping Rate to a Clear-Channel T3 Interface on a Channelized DS3 IQ PIC

[edit interfaces]
ct3-2/1/0 {no-partition;}
t3-2/1/0 {unit 0 {family inet {address 10.40.1.1/30;}}}
 [edit class-of-service]
interfaces {t3-2/1/0 {shaping-rate 2500;unit 0 {scheduler-map sched_port_1;}}}

Applying a Scheduler Map and Shaping Rate to Fractional T1 Interfaces on a Channelized DS3 IQ PIC

[edit interfaces]
ct3-1/1/3 {partition 1-3 interface-type t1;}
t1-1/1/3:1 {t1-options {timeslots 1-2;}unit 0 {family inet {address 10.10.1.1/30;}}}
t1-1/1/3:2 {t1-options {timeslots 3-6;}unit 0 {family inet {address 10.10.1.5/30;}}}
t1-1/1/3:3 {t1-options {timeslots 7-12;}unit 0 {family inet {address 10.10.1.9/30;}}}
 [edit class-of-service]
interfaces {t1-1/1/3:1 {scheduler-map sched_port_1;shaping-rate 1200;}t1-1/1/3:2 {scheduler-map sched_port_1;shaping-rate 1300;}t1-1/1/3:3 {scheduler-map sched_port_1;shaping-rate 1400;}}

Applying a Scheduler Map and Shaping Rate to a DS0 Channel of a T1 Interface in a Channelized T3 Interface on a Channelized DS3 IQ PIC

[edit interfaces]
ct3-2/1/3 {partition 1 interface-type ct1;}
ct1-2/1/3:1 {partition 1 timeslots 1-4 interface-type ds;}
ds-2/1/3:1:1 {unit 0 {family inet {address 10.20.144.1/30;}}}
 [edit class-of-service]
interfaces {ds-2/1/3:1:1 {scheduler-map sched_port_1;shaping-rate 1100;}}

Published: 2013-07-31

Supported Platforms

Published: 2013-07-31