fec (MX Series)
Syntax (M Series, MX Series, PTX Series)
fec (efec | gfec | gfec-sdfec |hgfec | sd-fec | ufec | none);
Syntax (ACX6360)
fec ( sdfec | sdfec15 | none);
Syntax (ACX5448-D)
fec ( sdfec | hgfec | sdfec15 | none);
Hierarchy Level (M Series, MX Series, PTX Series)
[edit interfaces interface-name otn-options]
Hierarchy Level (ACX6360, ACX5448-D)
[edit interfaces interface-name optics-options]
Description
Enable forward error correction (FEC) mode.
Default
If you do not specify a mode, the default mode is gfec. On PTX
Series routers with P1-PTX-2-100G-WDM, the default value is
gfec-sdfec. On PTX Series routers with PTX-5-100G-WDM and on MX
Series routers with MIC3-100G-DWDM, the default value is
sdfec.
Options
efec—(M Series, MX Series routers and PTX Series routers only) G.975.1 I.4 enhanced forward error correction (EFEC) is configured to detect and correct bit errors. This mode is supported only on 10G ports and not supported on the 40G and 100G ports.
gfec—(M series, MX Series routers and PTX Series routers only) G.709 generic forward error correction (GFEC) mode is configured to detect and correct bit errors.
gfec-sdfec—(PTX Series routers only) GFEC and soft-decision forward error correction (SD-FEC) modes are configured to detect and correct bit errors.
hgfec—(MX Series routers only) High gain forward error correction mode is configured to detect and correct bit errors.
sdfec—(MX Series routers, PTX Series routers, and ACX6360 routers only) Sky-Compatible Soft-decision forward error correction mode is configured to detect and correct bit errors.
sdfec15—(ACX6360 routers only) Soft Decision Forward Error Correction with 15 percent overhead is configured to detect and correct bit errors.
none—(M Series and MX Series routers only) FEC mode is not configured.
On MX Series routers with MIC3-100G-DWDM and PTX Series routers with
PTX-5-100G-WDM, none option is not supported. The fec mode must
be enabled on the MIC3-100G-DWDM MIC and the PTX-5-100G-WDM PIC.
ufec—(MX Series routers and PTX Series routers only) G.975.1 I.7 Ultra Forward Error Correction (UFEC) mode is configured to detect and correct bit errors. This mode is supported only on 10G ports and not supported on the 40G and 100G ports.
Required Privilege Level
interface—To view this statement in the configuration.
interface-control—To add this statement to the configuration.
Release Information
Statement introduced in Junos OS Release 9.4.
Statement and gfec-sdfec option introduced in Junos OS Release 13.2
for PTX Series routers. with P1-PTX-2-100G-WDM PIC.
Options efec, gfec, and ufec
introduced in Junos OS Release 13.3 for MX Series routers. with MPC5E-100G10G,
MPC5E-40G10G, MIC6-10G-OTN, and
MIC6-100G-CFP2.
Options efec, gfec, and ufec
introduced in Junos OS Release 14.1 for PTX Series routers. with
P1-PTX-24-10G-W-SFPP.
Option hgfec introduced in Junos OS Release 15.1F5 for MX Series
Routers with MIC3-100G-DWDM MIC.
Option sdfec introduced in Junos OS Release 15.1F5 for MX Series
Routers with MIC3-100G-DWDM MIC.
Option sdfec introduced in Junos OS Release 15.1F6 for PTX Series
Routers with PTX-5-100G-WDM PIC.