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Channelization of OC12/STM4 IQ and Channelized OC12/STM4 IQE PICs (SONET Mode)
Channelized OC12/STM4 IQ PICs and Channelized OC12/STM4 IQE PICs can be configured to operate in SONET or SDH mode and partitioned into various partitions. Figure 1 illustrates one possible channelization configuration for Channelized OC12/STM4 IQ and IQE PICs operating in SONET mode.
Figure 1: Sample Channelization of OC12/STM4 IQ or IQE PIC (SONET Mode)
In the example in Figure 1, a Channelized OC12/STM4 IQ or IQE PIC operating in SONET mode is partitioned into the following OC slices:
- An OC3 interface.
- Another OC3 interface.
- A channelized OC1 partitioned into T1 interfaces.
- A channelized OC1 converted into a T3 interface.
- A channelized OC1 partitioned into T1 interfaces and channelized T1s, which are partitioned into NxDS0 interfaces.
- A channelized OC1 converted into a channelized T3, which is partitioned into T1 interfaces.
- A channelized OC1 converted into a channelized T3, which is partitioned into T1 interfaces and a channelized T1, which is partitioned into NxDS0 interfaces.
- A channelized OC1 partitioned into channelized T1s, which are partitioned into NxDS0 interfaces.
