- play_arrow Hierarchical CoS for Subscriber Management
- play_arrow Hierarchical Class of Service for Subscriber Management
- Hierarchical Class of Service for Subscriber Management Overview
- Understanding Hierarchical CoS for Subscriber Interfaces
- Hardware Requirements for Dynamic Hierarchical CoS
- Configuring Static Hierarchical Scheduling in a Dynamic Profile
- Configuring Hierarchical CoS for a Subscriber Interface of Aggregated Ethernet Links
- Configuring Hierarchical CoS on a Static PPPoE Subscriber Interface
- Example: Maintaining a Constant Traffic Flow by Configuring a Static VLAN Interface with a Dynamic Profile for Subscriber Access
- play_arrow Applying CoS to Groups of Subscriber Interfaces
- play_arrow Configuring Hierarchical Scheduling for MPLS Pseudowire Interfaces
- Hierarchical CoS on MPLS Pseudowire Subscriber Interfaces Overview
- CoS Configuration Overview for MPLS Pseudowire Subscriber Interfaces
- CoS Two-Level Hierarchical Scheduling on MPLS Pseudowire Subscriber Interfaces
- Configuring CoS Two-Level Hierarchical Scheduling for MPLS Pseudowire Subscriber Interfaces
- CoS Three-Level Hierarchical Scheduling on MPLS Pseudowire Subscriber Interfaces
- Configuring CoS Three-Level Hierarchical Scheduling for MPLS Pseudowire Subscriber Interfaces (Logical Interfaces over a Transport Logical Interface)
- Configuring CoS Three-Level Hierarchical Scheduling for MPLS Pseudowire Subscriber Interfaces (Logical Interfaces over a Pseudowire Interface Set)
- play_arrow Configuring Hierarchical Scheduling for L2TP
- play_arrow Preventing Bandwidth Contention on Subscriber Interfaces
- Hierarchical CoS Shaping-Rate Adjustments Overview
- Shaping Rate Adjustments for Subscriber Local Loops Overview
- Guidelines for Configuring Shaping-Rate Adjustments for Subscriber Local Loops
- Configuring the Minimum Adjusted Shaping Rate on Scheduler Nodes for Subscribers
- Configuring Shaping-Rate Adjustments on Queues
- Enabling Shaping-Rate Adjustments for Subscriber Local Loops
- Disabling Shaping-Rate Adjustments for Subscriber Local Loops
- Disabling Hierarchical Bandwidth Adjustment for Subscriber Interfaces with Reverse-OIF Mapping
- Example: Configuring Hierarchical CoS Shaping-Rate Adjustments for Subscriber Local Loops
- Verifying the Configuration of Shaping-Rate Adjustments for Subscriber Local Loops
- Verifying the Configuration of ANCP for Shaping-Rate Adjustments
- Using Hierarchical CoS to Adjust Shaping Rates Based on Multicast Traffic
- play_arrow Configuring Targeted Distribution of Subscribers on Aggregated Ethernet Interfaces
- Distribution of Demux Subscribers in an Aggregated Ethernet Interface
- Providing Accurate Scheduling for a Demux Subscriber Interface of Aggregated Ethernet Links
- Configuring the Distribution Type for Demux Subscribers on Aggregated Ethernet Interfaces
- Configuring Link and Module Redundancy for Demux Subscribers in an Aggregated Ethernet Interface
- Configuring Rebalancing of Demux Subscribers in an Aggregated Ethernet Interface
- Example: Separating Targeted Multicast Traffic for Demux Subscribers on Aggregated Ethernet Interfaces
- Verifying the Distribution of Demux Subscribers in an Aggregated Ethernet Interface
- Configuring the Distribution Type for PPPoE Subscribers on Aggregated Ethernet Interfaces
- Verifying the Distribution of PPPoE Subscribers in an Aggregated Ethernet Interface
- play_arrow Applying CoS Using Parameters Received from RADIUS
- Subscriber Interfaces That Provide Initial CoS Parameters Dynamically Obtained from RADIUS
- Changing CoS Services Overview
- CoS Traffic Shaping Attributes for Dynamic Interface Sets and Member Subscriber Sessions Overview
- Guidelines for Configuring CoS Traffic Shaping Attributes for Dynamic Interface Sets and Member Subscriber Sessions
- Configuring Initial CoS Parameters Dynamically Obtained from RADIUS
- Configuring Static Default Values for Traffic Scheduling and Shaping
- Applying CoS Traffic-Shaping Attributes to Dynamic Interface Sets and Member Subscriber Sessions
- CoS Traffic Shaping Predefined Variables for Dynamic Interface Sets
- Example: Configuring Dynamic Hierarchical Scheduling for Subscribers
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- play_arrow Configuration Statements and Operational Commands
Jitter Reduction in Hierarchical CoS Queues
Queue Jitter as a Function of the Maximum Number of Queues
Each queuing chip on a Modular Interface Card (MIC) or Modular Port Concentrator (MPC) internally hosts a rate wheel thread that updates the shaper credits into the shapers available at each level of scheduling hierarchy. At each hierarchy level, the length of this update period determines two key characteristics of scheduling:
The minimum buffer needed for the queue to pass packets without dropping.
The degree of jitter encountered in the queue.
At each hierarchy level, the length of the rate wheel update
period is dependent upon the number of entities enabled for that node
level. Because traffic is queued at Level 5 (queues) and scheduled
upwards to Level 1 (the port), the number of entities (queues)
enabled at Level 5 determines the number of entities (logical
interfaces, interface-sets, or ports) enabled at the other levels
of the scheduling hierarchy. By extension, the number of queues enabled
for a given scheduler node hierarchy determines the length of the
update period at all hierarchy levels. Consequently, limiting the
maximum number of queues supported by a hierarchical queuing MIC or
MPC can reduce jitter in the queues. To configure the maximum number
of queues allowed per hierarchical queuing MIC or MPC, include the max-queues statement
at the [edit chassis fpc slot-number] hierarchy level.
Default Maximum Queues for Hierarchical Queuing MICs and MPCs
The QX chip on a MIC or MPC consists of two symmetrical halves, and each half supports a maximum of 64 K queues (128 K queues per QX chip). The 2-port and 4-port 10-Gigabit Ethernet MICs with XFP and the MPC1_Q line cards have one chipset and can support a maximum of 128 K queues, distributed across the two partitions of the single QX chip. The MPC2 Q and MPC2 EQ line cards have two chipsets and can support a maximum of 256 K queues, distributed across the four partitions of the two QX chips.
Table 1 lists the maximum number of queues supported by default and the corresponding rate wheel update period for each hierarchical queuing MIC or MPC.
Router Model | Hierarchical Queuing MIC or MPC | Maximum Queues | Rate Wheel Update Period |
|---|---|---|---|
MX5, MX10, MX40, and MX80 modular | 2-port 10-Gigabit Ethernet MIC with XFP The chassis base board hosts one chipset-based Packet Forwarding Engine process that operates in standalone mode. The single QX chip is composed of two partitions that each support 64 K queues for egress ports. | 128 K | 1.6 ms |
MX240, MX480, MX960, MX2010, and MX2020 | MPC1 Q The MPC1 Q line card hosts one chipset-based Packet Forwarding Engine process that operates in fabric mode. The single QX chip is composed of two partitions that each support 64 K queues for egress ports. | 128 K | 1.6 ms |
| MPC2 Q The MPC2 Q line card hosts two chipset-based Packet Forwarding Engine processes that operate in fabric mode. The two QX chips are composed of four partitions that each support 64 K queues for egress ports. | 256 K | 1.6 ms | |
| MPC2 EQ The MPC2 EQ line card hosts two chipset-based Packet Forwarding Engine processes that operate in fabric mode. The two QX chips are composed of four partitions that each support 64 K queues for egress ports. | 256 K | 2.6 ms |
You can configure hierarchical queuing MICs and MPCs to support a reduced maximum number of queues. Doing so reduces the rate wheel update period used by the QX chip, which in turn reduces jitter in the queues for the egress interfaces hosted on the line card.
Shaping Rate Granularity as a Function of the Rate Wheel Update Period
Reducing the length of the QX chip rate wheel update period, in addition to reducing jitter in the hierarchical scheduling queues, also indirectly increases the shaping granularity.
For a given port line rate and scheduling hierarchy level, the shaping granularity is a function of the minimum shaper credit size and the rate wheel update period in effect as a result of the number of queues supported by the line card.
shaping granularity = minimum shaper credit size / rate wheel update period
Table 2 shows how shaping granularity is calculated for non-enhanced hierarchical queuing MIC and MPC line cards with default values for minimum shaper credit size and for rate wheel update period.
Port Type | Hierarchy Level | Non-Enhanced Queuing MIC or MPC Defaults | Calculation of Shaping Granularity | |
|---|---|---|---|---|
Minimum Credit | Update Period | |||
1 Gbps Queuing | Level 1 (port), Level 4 (queues) |
|
|
|
Level 2, Level 3 |
|
|
| |
10 Gbps Queuing | Level 1 (port), Level 4 (queues) |
|
|
|
Level 2, Level 3 |
|
|
| |
