- play_arrow Overview
- play_arrow Precision Time Protocol
- play_arrow Precision Time Protocol Overview
- play_arrow Precision Time Protocol Clocks
- PTP Boundary Clock Overview
- Example: Configure PTP Boundary Clock
- Example: Configure PTP Boundary Clock With Unicast Negotiation
- Configure PTP TimeTransmitter Clock
- Configure PTP TimeReceiver Clock
- Example: Configure Ordinary TimeReceiver Clock With Unicast-Negotiation
- Example: Configure Ordinary TimeReceiver Clock Without Unicast-Negotiation
- PTP Transparent Clocks
- Configure PTP Transparent Clock
- play_arrow Precision Time Protocol Profiles
- play_arrow PHY Timestamping
- play_arrow Precision Time Protocol over Ethernet
- PTP over Ethernet Overview
- Guidelines to Configure PTP over Ethernet
- Configure PTP Dynamic Ports for Ethernet Encapsulation
- Configure PTP Multicast TimeTransmitter and TimeReceiver Ports for Ethernet Encapsulation
- Example: Configure PTP over Ethernet for Multicast TimeTransmitter, TimeReceiver, and Dynamic Ports
- play_arrow Precision Time Protocol Additional Features
- Precision Time Protocol (PTP) over Link Aggregation Group (LAG)
- Precision Time Protocol (PTP) Trace Overview
- Line Card Redundancy for PTP
- Timing Defects and Event Management on Routing Platforms
- SNMP MIB for Timing on Routing Platforms
- PTP Passive Port Performance Monitoring on PTX10004 and PTX10008 Devices
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- play_arrow Global Navigation Satellite System (GNSS)
- play_arrow GPS Systems on Routing Platforms
- play_arrow Integrated GNSS on Routing Platforms
- play_arrow GNSS Configuration for Routers Using External GNSS Receiver
- play_arrow Assisted Partial Timing Support (APTS) on Routing Platforms
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- play_arrow Network Time Protocol
- play_arrow NTP Concepts
- play_arrow NTP Configuration Examples
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- play_arrow Synchronous Ethernet
- play_arrow Synchronous Ethernet Overview
- play_arrow Synchronous Ethernet on 10-Gigabit Ethernet MIC
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- play_arrow Clock Synchronization
- play_arrow Clock Synchronization Concepts
- play_arrow Clock Synchronization for ACX Series Routers
- play_arrow Clock Synchronization for MX Series Routers
- play_arrow Clock Synchronization for PTX Series Routers
- play_arrow Centralized Clocking
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- play_arrow Hybrid Mode
- play_arrow Hybrid Mode Overview
- play_arrow Hybrid Mode and ESMC Quality-Level Mapping
- Configure Hybrid Mode and ESMC Quality-Level Mapping Overview
- Configure Hybrid Mode with Mapping of the PTP Clock Class to the ESMC Quality-Level
- Configure Hybrid Mode with a User-Defined Mapping of the PTP Clock Class to the ESMC Quality-Level
- Example: Configure Hybrid Mode and ESMC Quality-Level Mapping on ACX Series Router
- Example: Configure Hybrid Mode and ESMC Quality-Level Mapping on MX240 Router
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- play_arrow Configuration Statements and Operational Commands
- play_arrow Appendix
Interface and Router Clock Sources Overview
Interface and Router Clock Sources Description
When configuring the router, you can configure the transmit clock on each interface; the transmit clock aligns each outgoing packet transmitted over the router’s interfaces. For both the router and interfaces, the clock source can be the router’s internal Stratum 3 clock, which resides on the control board, or an external clock that is received from the interface you are configuring. For example, interface A can transmit on interface A’s received clock (external, loop timing) or the Stratum 3 clock (internal, line timing). Interface A cannot use a clock from any other source.
By default, each interface uses the router’s internal
Stratum 3 clock. To configure the clock source of each interface,
include the clocking
statement at the [edit interfaces interface-name]
hierarchy level:
[edit interfaces interface-name] clocking (internal | external);
System reference clocks can be generated from different system components, depending on the router type. For example, Figure 1 illustrates the different clock sources on the M120 router.

Configuring an External Synchronization Interface
The M40e, M120, M320, T640, and T1600 routers support an external synchronization interface that can be configured to synchronize the internal Stratum 3 clock to an external source, and then synchronize the chassis interface clock to the external source.
This feature can be configured for external primary and secondary interfaces that use Building Integrated Timing System (BITS) or SDH Equipment Timing Source (SETS) timing sources. When internal timing is set for SONET/SDH, Plesiochronous Digital Hierarchy (PDH), and digital hierarchy (DS1) interfaces on the Physical Interface Cards (PICs), the transmit clock of the interface is synchronized to BITS/SETS timing and traceable to timing within the network.
To configure external synchronization on M40e, M120, M320, T640,
and T1600 routers, include the synchronization
statement
at the [edit chassis]
hierarchy level.
For more information about the external synchronization interface, see Configuring Junos OS to Support an External Clock Synchronization Interface for M Series, MX Series, and T Series Routers.