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Schedulers on the Router Hardware, PIC, MIC, and MPC Families

Table 1 compares the PIC, MIC, and MPC interface families with regard to scheduler statements or features. Note that this table reflects the ability to perform the scheduler function at the PIC, MIC, or MPC interface level and not necessarily on the system as a whole.

In this table, the OSE PICs refer to the 10-port 10-Gigabit OSE PICs (described in some guides as the 10-Gigabit Ethernet LAN/WAN PICs with SFP+).

Table 1: Schedulers on the Router Hardware and Interface Families Compared

Scheduler Statement or Feature:

M320 and T Series

MIC and MPC Interfaces

IQ PICs

IQ2 PICs

IQ2E PICs

OSE PICs on T Series

Enhanced IQ PICs

Exact transmit rate

Yes

Yes

Yes

–

–

Yes

Yes

Rate-limit transmit rate

–

Yes

–

Yes

Yes

Yes

Yes

More than one high-priority queue

Yes

Yes

Yes

–

Yes

–

Yes

Excess priority or sharing

–

Yes

–

–

–

–

Yes

Hierarchical Scheduling

–

Yes, for EQ MPC

–

–

Yes

–

–